This document covers the configuration and usage of eCos and RedBoot on the Broadcom BCM956150 SVK reference board. This board is fitted with a BCM56150 CPU and it is referred to in this document and the configuration system as a BCM56150 Reference, or bcm56150_ref, to differentiate it from other Broadcom boards.
In addition to the BCM56150, the board contains 512MiB SDRAM main memory, a 256Mib (32MiB) SPI NOR Flash, a connector for CCA UART1, Ethernet sockets for both the IProc and switch Ethernet interfaces, plus a variety of connectors for other interfaces. The extent of eCos support for the devices and peripherals on the board and the CPU is described below.
For typical eCos development, a RedBoot image is programmed into the SPI NOR flash memory, and the board will load this image from reset. RedBoot provides gdb stub functionality so it is then possible to download and debug eCos applications via the gdb debugger using the serial line.
This documentation is expected to be read in conjunction with the Broadcom IProc processor HAL documentation and further device support and subsystems are described and documented there.
The SPI NOR flash consists of 512 blocks of 64KiB each. In a typical setup, the first 13 blocks are reserved for the use of the ROMRAM RedBoot image. One block is reserved to contain DRAM memory parameters. The topmost block is used to manage the flash and also holds RedBoot fconfig values. The remaining blocks can be used by application code.
Serial support is through the
CYGPKG_IO_SERIAL_GENERIC_16X5X generic driver
package which is modified by the
package for the IProc. These packages support both the serial
devices on the IProc ChipCommonA device. However, this board only
has UART1 connected to an external connector which this HAL
indicates by implementing the
interface. This serial channel is used by RedBoot for
communication with the host. If this device is needed by the
application, either directly or via the serial driver, then it
cannot also be used for RedBoot communication. The serial driver
package is loaded automatically when configuring for the
The platform HAL provides definitions to enable access to flash
devices on the SPI bus. The HAL enables the QSPI driver
CYGPKG_DEVS_FLASH_QSPI_IPROC) which in turn
provides the underlying implementation for access to the Micron
N25Q256 SPI NOR flash. The QSPI support integrates with the
CYGPKG_DEVS_FLASH_SPI_M25PXX package. These
packages are automatically loaded when configuring for the
target. This driver is capable of supporting the JFFS2 filesystem,
although at greatly reduced performance compared with a parallel
In general, devices (Caches, GPIO, UARTs) are initialized only as far as is necessary for eCos to run. Other devices (RTC, QSPI, Ethernet etc.) are not touched unless the appropriate driver is loaded, although in some cases, the HAL boot sequence will set up the appropriate power control and pin multiplexing configuration.
The board support is intended to work with GNU tools configured for an arm-eabi target. The original port was undertaken using arm-eabi-gcc version 4.7.3, arm-eabi-gdb version 7.2, and binutils version 2.23.2.