Setup

Name

Setup -- Preparing the BCM56150 Reference board for eCos Development

Overview

In a typical development environment, the board boots from the SPI NOR Flash and runs the RedBoot bootloader and debug agent from SDRAM. eCos applications are configured for RAM startup and then downloaded and run on the board via the debugger arm-eabi-gdb. Preparing the board therefore usually involves programming a suitable RedBoot image into flash memory.

The following RedBoot configurations are supported:

ConfigurationDescriptionUseFile
ROMRAMRedBoot loaded from SPI NOR flash to SDRAMredboot_ROMRAM.ecmredboot_ROMRAM.bin
ROMRedBoot executed directly from SPI NOR flashredboot_ROM.ecmredboot_ROM.bin

For serial communications, all versions run with 8 bits, no parity, and 1 stop bit at 115200 baud. RedBoot also supports flash management.

By default the ROMRAM startup should be used since it relocates itself to RAM after initializing the SDRAM controller. The ROM startup RedBoot is mainly used for debugging board initialization.

Initial Installation

The BCM56150 Reference board comes with U-Boot and Linux installed by default on the SPI NOR flash. For eCos development we need to install RedBoot in the flash. The booting mechanism is that the on-chip firmware interrogates the boot mode pins and jumps to the start of the memory region corresponding to the device selected. For our purposes, this is the start of the memory-mapped SPI NOR flash.

RedBoot must be written to the first few blocks of the SPI NOR flash. Thirteen sectors or 832KiB are reserved for this. There are several ways that this flash may be written. The N25Q256 is removable and may be programmed externally. The SPI CS/SCLK/MOSI/MISO lines are available on a header and may be used to program the flash from an external device. It may also be programmed using software running on the board. The following explains how to program RedBoot using a Lauterbach Power Debug via Trace32.

Programming RedBoot into NOR flash using Trace32

The following gives the steps needed to program RedBoot into the SPI NOR Flash using a Lauterbach Power Debug Interface and Trace32.

  1. Install Trace32 onto your host system. Attach the Power Debug module to the JTAG header (JP1801) and to a USB port on the host. Attach the serial adaptor cable from J1801 to a host serial port and run a suitable terminal communications program (e.g. TeraTerm or Putty on Windows, minicom on Linux). The default serial settings are 115200,8,N,1 with no flow control.

  2. Locate the boot selection jumper (JP900) and move the jumper from the 5-6 position to 1-2. Power up the board and the Power Debug.

  3. Copy ecospro.cmm, layout.cmm and hr2_prog_sflash_trace32 from hal/arm/cortexa/bcm56150_ref/VERSION/misc in the repository to a working directory.

  4. Copy redboot_ROMRAM.bin to the same directory, renaming it app.bin.

  5. With the work directory as your current directory, start Trace32.

  6. From the File menu, select Run Script and run the ecospro.cmm script.

  7. From the eCosPro menu select the Program APP.BIN to Flash entry. This should proceed to load hr2_prog_sflash_trace32 into on-chip SRAM, erase the flash and program the contents of app.bin into flash. This will take a while to complete.

  8. Once the programming is finished, shut down Trace32. Power off the board. Detach the Power Debug from the board.

  9. Move the jumper on JP900 back to the 5-6 position.

  10. Power up the board. The DRAM initialization code may spend some time optimizing the memory parameters. This may take several minutes and result in many lines of diagnostic output. This will only need to be done once, in the future these parameters will be loaded from flash.

  11. When the DRAM initialization is finished, output similar to the following will be seen on the serial output:

    +**Warning** FLASH configuration checksum error or invalid key
    RedBoot(tm) bootstrap and debug environment [ROMRAM]
    Non-certified release, version UNKNOWN - built 18:05:47, Nov 11 2015
    
    Copyright (C) 2000-2009 Free Software Foundation, Inc.
    Copyright (C) 2003-2014 eCosCentric Limited
    RedBoot is free software, covered by the eCos license, derived from the
    GNU General Public License. You are welcome to change it and/or distribute
    copies of it under certain conditions. Under the license terms, RedBoot's
    source code and full license terms must have been made available to you.
    Redboot comes with ABSOLUTELY NO WARRANTY.
    
    Platform: Broadcom BCM56150 Reference Platform (Cortex-A9) 
    RAM: 0x60000000-0x80000000 [0x6012c680-0x7ffed000 available]
    FLASH: 0x1c000000-0x1dffffff, 512 x 0x10000 blocks
    RedBoot>
          
  12. Run the following commands to initialize RedBoot's flash file system and flash configuration:

    RedBoot> fis init
    About to initialize [format] FLASH image system - continue (y/n)? y
    *** Initialize FLASH Image System
    ... Erase from 0x1dff0000-0x1dffffff: .
    ... Program from 0x7fff0000-0x80000000 to 0x1dff0000: .
    RedBoot>
    RedBoot> fconfig -i
    Initialize non-volatile configuration - continue (y/n)? y
    Run script at boot: false
    Console baud rate: 115200
    Update RedBoot non-volatile configuration - continue (y/n)? y
    ... Erase from 0x1dff0000-0x1dffffff: .
    ... Program from 0x7fff0000-0x80000000 to 0x1dff0000: .
    RedBoot>
          

The RedBoot installation is now complete. This can be tested by power cycling the board again. Output similar to the following should be seen on the serial port.

Clocks (MHz): CPU 1000 Periph 500 AXI 400 APB 250
DEV ID = 0xdb56
SKU ID = 0xb150
DDR type: DDR3
MEMC 0 DDR speed = 667MHz
PHY revision version: 0x00024006
ddr_init2: Calling soc_ddr40_set_shmoo_dram_config
ddr_init2: Calling soc_ddr40_phy_calibrate
C01. Check Power Up Reset_Bar
C02. Config and Release PLL from reset
C03. Poll PLL Lock
C04. Calibrate ZQ (ddr40_phy_calib_zq)
C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT
C06. DDR40_PHY_DDR3_MISC
C07. VDL Calibration
C07.1
C07.2
C07.4
C07.4.1
C07.4.4
VDL calibration result: 0x30000003 (cal_steps = 0)
C07.4.5
C07.4.6
C07.5
C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT....
C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) ....
C10. Wait for Phy Ready...Done.
DDR phy calibration passed
Programming controller register
ddr_init2: Wait for MemC ready 
ddr_init2: MemC initialization complete
Validate Shmoo parameters stored in flash ..... OK
Restoring Shmoo parameters from flash ..... done
Running simple memory test ..... OK
DeepSleep wakeup: ddr init bypassed 3
DDR Interface Ready
+
RedBoot(tm) bootstrap and debug environment [ROMRAM]
Non-certified release, version UNKNOWN - built 18:05:47, Nov 11 2015

Copyright (C) 2000-2009 Free Software Foundation, Inc.
Copyright (C) 2003-2014 eCosCentric Limited
RedBoot is free software, covered by the eCos license, derived from the
GNU General Public License. You are welcome to change it and/or distribute
copies of it under certain conditions. Under the license terms, RedBoot's
source code and full license terms must have been made available to you.
Redboot comes with ABSOLUTELY NO WARRANTY.

Platform: Broadcom BCM56150 Reference Platform (Cortex-A9) 
RAM: 0x60000000-0x80000000 [0x6012c680-0x7ffed000 available]
FLASH: 0x1c000000-0x1dffffff, 512 x 0x10000 blocks
RedBoot> fis list
Name              FLASH addr  Mem addr    Length      Entry point
RedBoot           0x1C000000  0x6012C800  0x000E0000  0x6012C800
Memory Params     0x1C0E0000  0x1C0E0000  0x00010000  0x00000000
FIS directory     0x1DFF0000  0x1DFF0000  0x0000F000  0x00000000
RedBoot config    0x1DFFF000  0x1DFFF000  0x00001000  0x00000000
RedBoot>
     

If it proves necessary to install a new version of RedBoot, this may be done from RedBoot itself over the serial line. From RedBoot run the following commands:

RedBoot> load -r -m y -b %{freememlo}
C
    

From the terminal program, transmit the new RedBoot binary using Y-Modem protocol. When it is finished, you should see something similar to the following:

    
CRaw file loaded 0x6012c800-0x60154a07, assumed entry at 0x6012c800
xyzModem - CRC mode, 1287(SOH)/0(STX)/0(CAN) packets, 4 retries
    

Now write the loaded binary over the current RedBoot in flash:

        
RedBoot> fis cre RedBoot
An image named 'RedBoot' exists - continue (y/n)? y
... Erase from 0x1c000000-0x1c0dffff: ..............
... Program from 0x6012c800-0x60154a08 to 0x1c000000: ...
... Erase from 0x1dff0000-0x1dffffff: .
... Program from 0x7fff0000-0x80000000 to 0x1dff0000: .
RedBoot>
    

The RedBoot image has now been replaced. Power cycle the board to execute it.

Rebuilding RedBoot

Should it prove necessary to rebuild a RedBoot binary, this is done most conveniently at the command line. The steps needed to rebuild the ROMRAM version of RedBoot for the BCM56150 Reference are:

$ mkdir redboot_bcm56150_ref_romram
$ cd redboot_bcm56150_ref_romram
$ ecosconfig new bcm56150_ref redboot
$ ecosconfig import $ECOS_REPOSITORY/hal/arm/cortexa/bcm56150_ref/VERSION/misc/redboot_ROMRAM.ecm
$ ecosconfig resolve
$ ecosconfig tree
$ make
    

At the end of the build the install/bin subdirectory should contain the file redboot.bin. This is a binary file that can be programmed directly to the flash.

2017-02-09
Documentation license for this page: eCosPro License