Name

Test Programs — Details

Test Programs

The STM32 variant HAL contains some test programs which allow various aspects of the microcontroller or the architecture to be tested.

Timers Test

The timers test checks the functionality of the microcontroller timers and in particular the interrupt priority and nesting mechanisms. The test programs all the available timers to interrupt at a variety of different rates and records various parameters. The timers are programmed to interrupt at higher rates for lower numbered timers, and higher rate timers are given higher priority. The test outputs a sequence of tables of the following format:

ISRs max_nesting 6 max_nesting_seen 7
 T      Ticks         0         1         2         3         4         5         6         7         8
 1:    937883    468079         0     84264     78541     73773     66846     60741     55480     50159
 2:    337228    186324         0         0     30306     28894     26156     24077     21771     19700
 3:    164018     99600         0         0         0     15444     14024     12693     11667     10590
 4:    120064     80417         0         0         0         0     11341     10349      9408      8549
 5:     82581     60965         0         0         0         0         0      7833      7181      6602
 6:     62154     50107         0         0         0         0         0         0      5953      6094
 7:     59684     53864         0         0         0         0         0         0         0      5820
 8:     51186     51186         0         0         0         0         0         0         0         0
DSRs
 T:                   0         1         2         3         4         5         6         7         8
 1:  preempt:    465351      1226       525       296       240       152       103        97        89
       count:         0     93768        10         0         0         0         0         0         0
 2:  preempt:    185237       606       127       116        75        60        41        27        35
       count:         0     33722         0         0         0         0         0         0         0
 3:  preempt:     99002       354        95         7        55        31        23        18        15
       count:         0     16401         0         0         0         0         0         0         0
 4:  preempt:     79892       331        83        39         3        23        21        12        13
       count:         0     12006         0         0         0         0         0         0         0
 5:  preempt:     60628       184        65        33        27         0         9        13         6
       count:         0      8258         0         0         0         0         0         0         0
 6:  preempt:     49798       180        53        22        21        15         0        12         6
       count:         0      6215         0         0         0         0         0         0         0
 7:  preempt:     53583       158        48        25        18        11        16         0         5
       count:         0      5968         0         0         0         0         0         0         0
 8:  preempt:     50937       140        46        22        18         6         9         8         0
       count:         0      5118         0         0         0         0         0         0         0

The first line shows the depth of ISR nesting seen since the last report, plus the maximum seen throughout the run.

The first table contains a row for each timer. The Ticks column shows the total number of ISRs called for this timer. The 0 column shows how many ISR calls interrupted thread state. The remaining columns show how many ISR calls preempted the ISR for the given timer. For example, the ISR for timer 1 preempted the ISR for timer 6 60741 times.

The second table contains two rows for each timer. The preempt: row shows how many times the ISR preempted the DSR for the given timer. The zero column correspond to thread state as before. For example the ISR for timer 2 preempted the DSR for timer 4 75 times. The count: row shows the range of count values passed to the DSR and indicate the number of DSR calls not matched exactly to ISR calls. The ISR calls the DSR every 10 ticks, so the total counts should be one tenth of the ISR Ticks value.