TX39 Hardware Setup

The eCos Developer’s Kit package comes with a pair of ROMs that provide GDB support for the Toshiba JMR-TX3904 RISC processor reference board by way of CygMon.

Images of these ROMs are also provided at BASE_DIR/loaders/tx39-jmr3904/cygmon50.bin and BASE_DIR/loaders/tx39-jmr3904/cygmon66.bin for 50 MHz and 66 MHz boards respectively. The ROMs are installed to sockets IC6 and IC7 on the memory daughterboard according to their labels. Attention should be paid to the correct orientation of these ROMs during installation.

The GDB stub allows communication with GDB using the serial port (channel C) at connector PJ1. The communication parameters are fixed at 38400 baud, 8 data bits, no parity bit, and 1 stop bit (8-N-1). No handshaking is employed. Connection to the host computer should be made using an RS232C null modem cable.

CygMon and eCos currently provide support for a 16Mbyte 60ns 72pin DRAM SIMM fitted to the PJ21 connector. Different size DRAMs may require changes in the value stored in the DCCR0 register. This value may be found near line 211 in hal/mips/arch/<version>/src/vectors.S in eCos, and near line 99 in libstub/mips/tx39jmr/tx39jmr-power.S in CygMon. eCos does not currently use the DRAM for any purpose itself, so it is entirely available for application use.

2017-02-09
Documentation license for this page: Open Publication License