The Cirrus Logic EP7212 Development Board is almost identical
to the EP7211 Development Board from a hardware setup viewpoint,
and is based on the same port of eCos. Therefore the earlier documentation
for the EP7211 Development Board can be considered equivalent, but
with the following changes:
The first serial port is silk screened as "UART 1" on
the EP7211 Development Board, but is silk screened as "Serial Port
0" on the EP7212 Development Board. Similarly "UART 2" is silk screened
as "Serial Port 1" on the EP7212 Development Board.
JP2 (used to control reprogramming of the FLASH) is not
silkscreened with "Boot Enable".
To setup the EP7212 Development Board for use with the
ARM Multi-ICE JTAG debugging interface unit, it is necessary to
connect TEST0 and TEST1 of the EP7212 to ground. On the Development
Board, this is accomplished by placing shorting blocks on JP47 and
JP48. When the shorting blocks are fitted, the board can only be
operated through the Multi-ICE - debugging over a serial line is
not possible.
Pre-built GDB stubs are
provided in the directory
loaders/arm-edb7212 relative to the
root of your eCos installation
When rebuilding the GDB stub ROM image, change the "Cirrus
Logic processor variant" option (CYGHWR_HAL_ARM_EDB7XXX_VARIANT)
from the EP7211 to the EP7212. This can be selected in the
eCos Configuration Tool
, or if using ecosconfig, can be set by uncommenting the user_value
property of this option in ecos.ecc and setting it to "EP7212".
