The STMicroelectronics ST40 Evaluation Board (henceforth just "ST40EB") has an ST40RA166XH processor, 32MB of external SDRAM, 4MB of external flash memory, an STE10/100A ethernet controller with integrated PHY (Intel i21143/DEC Tulip compatible), two 9-pin SCIF serial interfaces, LCD display panel and connectors plus required support chips for all the on-chip peripherals.
For typical eCos development, a RedBoot image is programmed into the flash memory, and the board will boot this image from reset. RedBoot provides gdb stub functionality so it is then possible to download and debug stand-alone and eCos applications via the gdb debugger. This can happen over either a serial line or over ethernet.
The flash memory consists of two ST M29W160DB parts in parallel, giving a total of 4M bytes of external Flash. In a typical setup, the first four flash blocks (256K bytes) are reserved for use for the ROM RedBoot image and the subsequent two are used to store a version of RedBoot that can run out of RAM. The topmost block is used to manage the flash and hold RedBoot fconfig values. The remaining blocks between 0xA0080000 and 0xA03DFFFF can be used by application code.
The board is fitted with a HUDI socket allowing use of the ST40-Connect/SH JTAG interface to perform hardware debugging. To use this, a set of GDB macro files are provided with a GNU GDB toolset provided by ST, and to connect to the board in this case the command to be used from the GDB prompt is:
(gdb) mb360 XX.XX.XX.XX
There is a serial driver
which supports the two on-chip serial devices. Either of these devices
can be used by RedBoot for communication with the host. If a device
is needed by the application, either directly or via the serial
driver, then it cannot also be used for RedBoot communication. Either the
alternative serial port, or another communication channel such as ethernet
should be used instead. The serial driver package is loaded automatically
when configuring for the st40raeb target.
There is an ethernet driver
for the ST40EB's onboard ethernet device. The device is accessed via the PCI bus.
This driver is also loaded automatically when configuring for the st40raeb
target, although not activated until generic ethernet package support is
eCos manages the on-chip interrupt controller. Timer 0 is used to implement the eCos system clock, and timer 1 is used to implement a microsecond delay function. Timer 2 is unused and left for the application. Other on-chip devices (FEMI, EMI, LMI, INTC, TMU, CAC, UBC, CPG) are initialized only as far as is necessary for eCos to run. Other devices (eg RTC, DMAC, ST expansion module interface (STEMI) etc) are not touched.
The ST40EB port is intended to work with GNU tools configured for an sh-elf target. The original port was done using sh-elf-gcc version 3.2.1, sh-elf-gdb version 5.3, and binutils version 2.13.1.