SAMA5D3x-MB Platform HAL


CYGPKG_HAL_ARM_CORTEXA_SAMA5D3X_MB -- eCos Support for the SAMA5D3x-MB Board


This document covers the configuration and usage of eCos and RedBoot on the Atmel SAMA53x-MB based evaluation kits. This motherboard is fitted with a SAMA5D3x-CM CPU module containing a variant of the SAMA5D3 family of microcontrollers. The board is referred to in this document using SAMA5D3x-MB. The eCos configuration system uses explicit target names to identify the available CPU evaluation kits based on this board, e.g. atsama5d31_ek, atsama5d33_ek, etc.

The CPU Module contains the available memories, as well as some I/O functionality to extend the features available on the base SAMA5D3x-MB motherboard. The CPU Module is connected to the J12 SODIMM 200 connector.

For typical eCos development it is expected that programs will be downloaded and debugged via the on-board J-Link USB interface (J14), or via a hardware debugger (JTAG/SWD) attached to the standard ARM 20-pin JTAG (J9) connector. Use of a hardware debugging interface avoids the requirement for a debug monitor application to be present on the platform.

Note: Hardware modification of the board may be required to add support to allow use of the 20-pin J9 connector.

See the CPU Module documentation regarding the use of flash for holding a RedBoot or GDB Stubs image if a debug monitor is required for development.

Supported Hardware

The SAMA5D3x-MB motherboard is common to different “EK” systems, but depending on the actual CPU installed some differences exist as to motherboard peripherals/connections that may be useable.

The motherboard provides the 10/100 Ethernet (MII/RMII) KSZ8051RNL PHY providing support via the J24 (labelled “ETH1”) connector. For CPU Module systems where the Gigabit GMAC interface is available the PHY and support logic is provided by the CPU Module. The base motherboard provides the J17 GETH connector.

The BMS signal to the CPU controls how the system is booted. The CPU variant bootstrap overview should be read in conjunction with this documentation. For example, when used with the SAMA5D3x-CM daughterboards the JP9 jumper controls the CPU bootstrap source:

Table 242-1. JP9 BMS

BMS signal (JP9) Description
JP9 OPEN Embedded (on-chip) RomBOOT first-level bootloader is used. Actual boot source used will depend on a combination of the CPU Module I/O configuration and the presence of suitable binaries.
JP9 CLOSED Application installed on the EBI_CS0 parallel NOR flash on the CPU Module daughterboard is executed in-situ.

Note: On the SAMA5D3x-MB the BMS signal is connected to GND through JP9 (shipped “open” by default).


The board port is intended to work with GNU tools configured for an arm-eabi target. The original port was done using arm-eabi-gcc version 4.7.3e, arm-eabi-gdb version 7.6.1, and binutils version 2.23.2. All development work and testing was undertaken using SAMA5D3x-MB REV.C hardware.

Documentation license for this page: eCosPro License