The HAL Port

Name

HAL Port -- Implementation Details

Overview

This documentation explains how the eCos HAL specification has been mapped onto the MPC5554DEMO hardware, and should be read in conjunction with that specification. The MPC5554DEMO platform HAL package complements the PowerPC architectural HAL and the MPC55XX variant HAL. It provides functionality which is specific to the target board.

Startup

Following a hard or soft reset the HAL will initialize or reinitialize most of the on-chip peripherals. There is an exception for RAM startup applications which depend on a ROM monitor for certain services.

For ROM startup, the HAL will perform additional initialization, setting up the external RAM and programming the various internal registers. This is all done in the hal_hardware_init function in the assembler source file mpc5554demo.S.

Linker Scripts and Memory Maps

The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:

Flash

This is located at address 0x00000000 of the physical memory space. It is mapped by the BAM 1-1 to virtual address 0x00000000 with caching enabled, and by eCos to 0x10000000 with caching disabled.

SRAM

This is located at address 0x20000000 of the physical memory space. The first 512 bytes are used for the VSR table and the next 256 bytes are normally used for the eCos virtual vectors, allowing RAM-based applications to use services provided by the ROM monitor. The next 512 bytes are used for a shared interrupt state table, recording mask and priority values for each interrupt source. For ROM and JTAG startup, all remaining SRAM is available. For RAM startup, available RAM starts at location 0x00008000, with the bottom 32kiB reserved for use by RedBoot. The SRAM is mapped 1-1 with cache enabled at virtual address 0x20000000 and uncached at 0x30000000.

on-chip peripherals

These are available via 1-1 uncached mappings at 0xFFF00000 and 0xC3F00000.

Real-time characterization

The tm_basic kernel test gives statistics gathered about the real-time characterization and performance of the kernel. The sample output is shown here for information.


            Startup, main stack : stack used   708 size  5664
             Startup :  Interrupt stack used   856 size  4096
             Startup : Idlethread stack used   220 size  2048

eCos Kernel Timings
Notes: all times are in microseconds (.000001) unless otherwise stated

Reading the hardware clock takes 13 'ticks' overhead
... this value will be factored out of all other measurements
Clock interrupt took    6.71 microseconds (858 raw clock ticks)

Testing parameters:
   Clock samples:            32
   Threads:                  17
   Thread switches:         128
   Mutexes:                  32
   Mailboxes:                32
   Semaphores:               32
   Scheduler operations:    128
   Counters:                 32
   Flags:                    32
   Alarms:                   32


                                 Confidence
     Ave     Min     Max     Var  Ave  Min  Function
  ======  ======  ======  ====== ========== ========
   17.12   15.38   34.45    2.10   94%  88% Create thread
    1.33    1.22    3.09    0.21   94%  94% Yield thread [all suspended]
    1.97    1.52    6.89    0.63   94%  88% Suspend [suspended] thread
    1.53    1.13    7.45    0.70   94%  94% Resume thread
    1.91    1.72    3.33    0.17   52%  41% Set priority
    0.09    0.07    0.48    0.05   94%  94% Get priority
    5.12    3.79   22.52    2.05   94%  94% Kill [suspended] thread
    1.37    1.22    3.71    0.28   94%  94% Yield [no other] thread
    2.25    2.00    6.18    0.46   94%  94% Resume [suspended low prio] thread
    1.18    1.14    1.88    0.08   94%  94% Resume [runnable low prio] thread
    1.65    1.52    3.00    0.21   82%  82% Suspend [runnable] thread
    1.58    1.22    7.39    0.68   94%  94% Yield [only low prio] thread
    1.14    1.10    1.69    0.06   94%  94% Suspend [runnable->not runnable]
    4.23    3.61   11.97    0.92   94%  94% Kill [runnable] thread
    3.71    2.78   15.52    1.39   94%  94% Destroy [dead] thread
    5.83    5.39   12.48    0.78   94%  94% Destroy [runnable] thread
   13.28   10.80   26.84    2.26   82%  88% Resume [high priority] thread
    2.69    2.59   12.10    0.19   98%  98% Thread switch

    0.05    0.04    1.36    0.02   99%  99% Scheduler lock
    0.85    0.84    1.98    0.02   99%  99% Scheduler unlock [0 threads]
    0.84    0.84    0.98    0.00   99%  99% Scheduler unlock [1 suspended]
    0.84    0.84    0.98    0.00   99%  99% Scheduler unlock [many suspended]
    0.85    0.84    1.07    0.00   99%  99% Scheduler unlock [many low prio]

    0.86    0.16    3.54    0.17   87%   6% Init mutex
    1.76    1.39    7.95    0.39   96%  96% Lock [unlocked] mutex
    2.00    1.58   15.00    0.81   96%  96% Unlock [locked] mutex
    1.41    1.21    7.68    0.39   96%  96% Trylock [unlocked] mutex
    1.16    1.10    2.88    0.11   96%  96% Trylock [locked] mutex
    0.16    0.15    0.55    0.02   96%  96% Destroy mutex
    8.00    7.90   10.75    0.19   93%  93% Unlock/Lock mutex

    1.29    0.33   13.13    0.74   90%  96% Create mbox
    0.87    0.20    2.05    0.74   59%  59% Peek [empty] mbox
    1.97    1.52   13.41    0.72   96%  96% Put [first] mbox
    0.03    0.02    0.60    0.04   96%  96% Peek [1 msg] mbox
    1.58    1.52    3.07    0.10   93%  93% Put [second] mbox
    0.03    0.02    0.44    0.03   96%  96% Peek [2 msgs] mbox
    2.26    1.65   19.64    1.09   96%  96% Get [first] mbox
    1.78    1.65    3.17    0.18   90%  68% Get [second] mbox
    1.42    1.28    5.59    0.26   96%  96% Tryput [first] mbox
    1.42    1.30    5.07    0.23   96%  96% Peek item [non-empty] mbox
    1.53    1.42    5.02    0.22   96%  96% Tryget [non-empty] mbox
    1.27    1.24    1.85    0.05   93%  93% Peek item [empty] mbox
    1.33    1.27    3.45    0.13   96%  96% Tryget [empty] mbox
    0.10    0.05    1.82    0.11   96%  96% Waiting to get mbox
    0.07    0.05    0.46    0.04   93%  93% Waiting to put mbox
    0.42    0.34    3.06    0.17   96%  96% Delete mbox
    5.90    5.57   13.93    0.62   93%  93% Put/Get mbox

    0.46    0.15    1.38    0.08   84%  12% Init semaphore
    1.13    1.04    1.82    0.13   90%  71% Post [0] semaphore
    1.30    1.25    1.64    0.08   87%  87% Wait [1] semaphore
    1.17    1.09    3.89    0.17   96%  96% Trywait [0] semaphore
    1.04    1.04    1.23    0.01   96%  96% Trywait [1] semaphore
    0.18    0.15    1.05    0.05   96%  96% Peek semaphore
    0.17    0.15    0.73    0.04   96%  96% Destroy semaphore
    5.01    4.98    5.89    0.06   96%  96% Post/Wait semaphore

    1.02    0.24    4.36    0.21   90%   6% Create counter
    0.69    0.06    3.77    0.66   78%  78% Get counter value
    0.07    0.04    1.02    0.06   96%  96% Set counter value
    1.31    1.26    1.85    0.09   84%  84% Tick counter
    0.18    0.15    1.30    0.07   96%  96% Delete counter

    0.50    0.15    1.72    0.09   87%   6% Init flag
    1.46    1.23    6.98    0.34   96%  96% Destroy flag
    1.08    1.02    3.10    0.13   96%  96% Mask bits in flag
    1.37    1.22    6.13    0.30   96%  96% Set bits in flag [no waiters]
    1.96    1.70   10.25    0.52   96%  96% Wait for flag [AND]
    1.65    1.63    2.24    0.04   96%  96% Wait for flag [OR]
    1.71    1.70    2.16    0.03   96%  96% Wait for flag [AND/CLR]
    1.64    1.63    1.96    0.02   96%  96% Wait for flag [OR/CLR]
    0.00    0.00    0.00    0.00  100% 100% Peek on flag

    2.24    0.68   11.62    0.59   93%   3% Create alarm
    3.04    2.24   14.94    0.97   87%  84% Initialize alarm
    1.14    1.03    4.33    0.20   96%  96% Disable alarm
    2.09    1.83    9.42    0.47   96%  96% Enable alarm
    1.33    1.22    4.84    0.22   96%  96% Delete alarm
    1.53    1.41    5.14    0.23   96%  96% Tick counter [1 alarm]
    7.59    7.47   11.20    0.23   96%  96% Tick counter [many alarms]
    2.49    2.44    4.22    0.11   96%  96% Tick & fire counter [1 alarm]
   44.24   44.22   44.78    0.03   96%  96% Tick & fire counters [>1 together]
    8.64    8.62    9.40    0.05   96%  96% Tick & fire counters [>1 separately]
    5.57    5.53    8.68    0.05   99%  99% Alarm latency [0 threads]
    6.86    5.54    7.84    0.58   67%  32% Alarm latency [2 threads]
    6.85    5.53   11.23    0.67   76%  19% Alarm latency [many threads]
   10.28   10.05   31.93    0.44   97%  97% Alarm -> thread resume latency

    1.12    1.08    6.98    0.00            Clock/interrupt latency

    2.77    2.26   12.51    0.00            Clock DSR latency

  635    604     665  (main stack:  1244)  Thread stack used (1704 total)
           All done, main stack : stack used  1244 size  5664
            All done :  Interrupt stack used   288 size  4096
            All done : Idlethread stack used   617 size  2048

Timing complete - 30880 ms total

PASS:<Basic timing OK>
EXIT:<done>
    

Other Issues

The MPC5554DEMO platform HAL does not affect the implementation of other parts of the eCos HAL specification. The MPC55XX variant HAL, and the PowerPC architectural HAL documentation should be consulted for further details.

2017-02-09
Documentation license for this page: eCosPro License