Cyclone II Standard Hardware Design HAL

Name

CYGPKG_HAL_NIOS2_CYCLONE2_2C35_STANDARD -- eCos Support for the Standard Hardware Design on a Cyclone II/2c35 Board

Description

This package provides the hardware design HAL for the standard hardware design running on a Cyclone II/2c35 board. This design is provided with the Altera Nios II Embedded Design Suite in the directory nios2eds/examples/vhdl/niosII_cycloneII_2c35/standard/. It includes the following functionality:

CPU

A Nios II/s processor running at 85MHz. This has 4K of instruction cache and no data cache. It has level 1 jtag support only with no hardware breakpoints. The reset vector is at address 0x00000000 in external flash and the exception vector is at address 0x02100020 in on-chip IRAM.

Flash

16MB of external AMD flash at 0x00000000 attached via an 8-bit data bus.

SDRAM

32MB of external SDRAM at 0x04000000.

SRAM

2MB of external SRAM at 0x01000000.

IRAM

4K of on-chip RAM at 0x02100000.

system clock

An Avalon timer labelled sys_clk used to implement the main eCos system clock. This is hardwired to run at 100Hz.

uart

An Avalon uart connected to the external transceiver on the board. This is hardwired at 115200 baud, 8 bits, no parity, 1 stop bit, and no RTS/CTS support. This uart is used by eCos for the HAL diagnostics and debug channel.

lan91c111

An interface to the external lan91c111 ethernet chip on the board. This provides network communications for RedBoot and for eCos applications using one of the available TCP/IP stacks.

GPIO

GPIO units connected to the row of LEDs, the dual seven-segment display, and the buttons. The devkit platform HAL provides some utility functions for the first two of these.

sysid

A system id register. This is used by RedBoot to check that the current hardware design matches the RedBoot build.

Other

A number of other hardware units including a second Avalon timer, a jtag uart, a character LCD controller, and an EPCS serial flash controller. These are not currently used by eCos so can be accessed directly by application code.

Configuration Options

This hardware design HAL package will be loaded automatically when creating an eCos configuration for the nios2_cyclone2_2c35_standard target, together with the Nios II architectural HAL and the devkit platform HAL. It should never be necessary to load this package explicitly. Unloading the package should only happen as a side effect of switching target hardware. The package does not contain any user configuration options.

Memory Map

For typical eCos usage the memory map is as follows:

AddressPurpose
0x0000000016MB of flash
0x00000000reset vector
0x00000000128K for RedBoot code
0x00c00000current hardware design
0x00e00000factory hardware design
0x00FF0000RedBoot fis and fconfig data
0x010000002MB of SRAM
0x021000004K of on-chip IRAM
0x02100020exception vector
0x02120000peripherals
0x0400000032MB of SDRAM
0x0400000064K for RedBoot data
0x04010000application code and data

2017-02-09
Documentation license for this page: eCosPro License