Most flash devices supported by the eCos Flash library are
categorised as NOR flash. These are fundamentally different from NAND
flash devices, both in terms of the storage cells deep within the chip,
and how they are addressed and used by applications.
Attribute
NOR
NAND
Addressing of data
By byte address within the device. Usually expressed as
memory-mapped addresses.
By row (page) number. Pages are a power of two; commonly 512 or
2048 bytes. Optimised for reading and writing a page at a time. Sometimes
supports column (byte) addressing, but this library does not expose
such functionality.
Not in general, though a few special-case exceptions exist such
as OneNAND devices.
Erase block size
May vary across the chip
A fixed number of pages, typically 64
Out-of-band data
Not supported
A small number of bytes per page - typically 16 "spare" per 512
"data" bytes - are usable by the application. They are read, written
and erased at the same time as the "real" page data.
Typically up to 20 eraseblocks are marked as factory-bad in
their OOB area. The OS is expected to scan these to create a Bad Block
Table. [c]
May data be rewritten without being erased first?
Usually (but only by resetting 1-bits to 0)
Usually, on SLC NAND chips; not on MLC chips.
Error detection and correction
Not present
Usually automatic. Typically this involves an Error Correcting
Code, automatically calculated and stored in the OOB area, then checked
on read.
Notes: a. In
other words, can the application read flash directly as if it
was RAM, or does it have to invoke the driver to copy data in and
out? b. Regions which were found
during manufacture to be bad and marked in some way - usually by placing
a special code in the Out Of Band area. c. Once a BBT exists it can then be used to keep
track of any blocks which fail through wear during the lifetime of the
device.
Since a NAND chip can in general only be read indirectly, its
contents must be copied to RAM before they can be executed. This means
that the caveats in the eCos FLASH library about disabling interrupts
whilst programming do not apply here, except in special cases such as
OneNAND devices.