This documentation explains how the eCos HAL specification has been
mapped onto the SEAD3 hardware, and should be read in conjunction with
that specification. The SEAD3 platform HAL package complements the
MIPS architectural HAL, the MIPS32 variant HAL It provides
functionality which is specific to the target board.
Startup
Following a hard or soft reset the HAL will set up some of the
peripherals (UART, GIC, LCD etc.) appropriately for eCos, but other
peripherals (USB, PIC32) are left to their default settings. Full
details of this initialization can be found in the
function hal_platform_init in
sead3.c.
Memory Map
The platform HAL package provides the memory layout information needed
to generate the linker script. The key memory locations are as follows:
SDRAM
On the LX110 this is 512MiB in size and mapped to location
0x80000000. The first four kilobytes are reserved for exception
vectors and for data which needs to be shared between RAM startup
applications and the ROM monitor. For JTAG startup, code will be
loaded from 0x80001000 onwards. For ROM startup data will be loaded
from 0x80001000 onwards. For ROMRAM startup, the text and data of the
applications will be loaded from 0x80001000 onwards. For RAM startup,
code will start at 0x80040000, reserving the bottom 256KiB for
RedBoot's code and data. This memory is not present on the LX50.
SRAM
On the LX50 this is 4MiB in size and is mapped to location
0x80000000. The first four kilobytes are reserved for exception
vectors and for data which needs to be shared between RAM startup
applications and the ROM monitor. For JTAG startup, code will be
loaded from 0x80001000 onwards. For ROM startup data will be loaded
from 0x80001000 onwards. For ROMRAM startup, the text and data of the
applications will be loaded from 0x80001000 onwards. For RAM startup,
code will start at 0x80040000, reserving the bottom 256KiB for
RedBoot's code and data. This memory is present on the LX110, where it
is mapped to 0x1E000000 and is unused by eCos.
On-chip Peripherals
These are accessible at location 0xBF000000 onwards.
Flash
The user flash device is located at 0x9C000000 onwards. CFI is used
at run-time to query the flash chip and adapt to it. Redboot is not
held in this flash device, but in a separate boot flash that is not
accessible at run time. The last user flash block at location
0x9DFC0000 is used to hold flash management data and the
RedBoot fconfig variables. The remaining blocks can
be used by application code.
Clock Support
The platform HAL provides configuration options for the eCos system
clock. This always uses the architectural COUNTER/COMPARE registers
accessed via coprocessor 0. The actual HAL macros for managing the
clock are provided by the MIPS architectural HAL. The specific numbers
used are a characteristic of the platform because they depend on the
processor speed. The interrupt controller's compare register and
interrupt is used for profiling.
Other Issues
The SEAD3 platform HAL does not affect the implementation of other
parts of the eCos HAL specification.
