eCos Support for the Malta Board -- Overview


This document covers the MIPS Malta single board computer based on the MIPS 4Kc, 4KEc and 5Kc processors. Suport for the 5Kc is restricted to RedBoot only, however, all 4Kc configurations of eCos and RedBoot will also function on a 5Kc.

The Malta board contains the processor, 32Mb of RAM, 4MB of flash memory, an AMD Am79C973 PCnet ethernet MAC, connections for two serial channels and the various other peripherals on the board.

For typical eCos development, a RedBoot image is programmed into the flash memory, and the board will boot this image from reset. RedBoot provides gdb stub functionality so it is then possible to download and debug stand-alone and eCos applications via the gdb debugger. This can happen over either a serial line or over ethernet.

Supported Hardware

The flash memory consists of two Intel 28F160 devices in parallel, giving 32 blocks of 128k bytes each. In a typical setup, the first two flash blocks are used for the ROM RedBoot image. The topmost block is used to manage the flash and hold RedBoot fconfig values. The remaining 29 blocks between 0xbe040000 and 0xbe3dffff can be used by application code.

There is a serial driver CYGPKG_IO_SERIAL_GENERIC_16X5X which supports the two UART serial devices on the Malta board. This is configured for the Malta by the CYGPKG_IO_SERIAL_MIPS_MALTA package. These devices can be used by RedBoot for communication with the host. If either of these devices is needed by the application, either directly or via the serial driver, then it cannot also be used for RedBoot communication. Another communication channel such as ethernet should be used instead. The serial driver package is loaded automatically when configuring for the Malta target.

There is an ethernet driver CYGPKG_DEVS_ETH_AMD_PCNET for the AMD Am79C973 PCnet ethernet device. A second package CYGPKG_DEVS_ETH_MIPS_MIPS32_MALTA is responsible for configuring this generic driver to the Malta hardware. These drivers are also loaded automatically when configuring for the Malta target.

eCos manages the on-chip interrupt controller. The MIPS32 architectural Count and Compare registers are used to implement the eCos system clock and the microsecond delay function. Other devices (Caches, PCI, UARTs, memory and interrupt controllers) are initialized only as far as is necessary for eCos to run. Other devices are not touched.


The Malta port is intended to work with GNU tools configured for an mipsisa32-elf target. The original port was undertaken using mipsisa32-elf-gcc version 3.2.1, mipsisa32-elf-gdb version 5.3, and binutils version 2.13.1.

Documentation license for this page: eCosPro License