Overview

Description

The H8/300 family includes the H8/300H and H8S processors. These processors execute a largely common instruction set and have the following common features:

• Eight general purpose 32-bit registers, ER0 to ER7,which may also be addressed as 16 16-bit and 16 8-bit registers. Register ER7 is also used as the stack pointer. In addition there is a 24-bit program counter, an 8-bit condition code register, and on the H8S an 8 bit extended control register.

• A linear address space, limited to 24-bits, matching the size of the PC. Hence the processor can address 16 megabytes of memory.

• No separate address space for I/O operations. Instead devices are accessed just like memory via the main address and data buses.

• A variable-length instruction set with a variety of different addressing modes.

• The H8/300H has a simple single-level interrupt system while the H8S can support an 8-level prioritized system via the extended control register.

• The H8S has support for single instruction tracing.

The architectural HAL provides support for those features which are common to all members of the H8/300 families, and for certain features which are present on some but not all members. A typical eCos configuration will also contain a variant HAL package with support code for a family of processors, possibly a processor HAL package with support for one specific processor, and a platform HAL which contains the code needed for a specific hardware platform. For example the variant or processor HAL may define the exact interrupt controller hardware that is available, and the platform HAL will define the external interrupt vector connections.