MCFxxxx Watchdog Driver


CYGPKG_DEVS_WATCHDOG_MCFxxxx -- eCos Support for the MCFxxxx On-chip Watchdog Device


Several members of the MCFxxxx ColdFire family have a simple watchdog device embedded in the System Control Module or SCM. This package CYGPKG_DEVS_WATCHDOG_MCFxxxx provides an eCos device driver for the watchdog device, complementing the generic package CYGPKG_IO_WATCHDOG. The driver functionality should be accessed via the standard eCos watchdog functions watchdog_start, watchdog_reset and watchdog_get_resolution.

The hardware has limited functionality: instead of automatically causing a reset when the watchdog triggers it can only raise an interrupt. By default the watchdog driver installs a non-maskable interrupt with the highest possible priority, and a custom interrupt VSR will immediately perform a reset using the chip's Reset Controller Module. This is not quite as good as a watchdog device which performs the reset automatically: corruption of the interrupt vector table, the interrupt controller, the SCM module, or the VSR code may prevent a reset from occurring. However in most circumstances a watchdog timeout will still result in a full reset. Alternatively the driver can be configured to generate an ordinary interrupt, leaving it up to application code to perform recovery from the timeout.

Configuration Options

The MCFxxxx watchdog driver package should be loaded automatically when selecting a platform containing a suitable ColdFire processor, and it should never be necessary to load it explicitly into the configuration. The package is inactive unless the generic watchdog support CYGPKG_IO_WATCHDOG is loaded. Depending on the choice of eCos template it may be necessary to load the latter.

The first configuration option is CYGIMP_WATCHDOG_HARDWARE, which can be used to disable the use of the hardware watchdog and switch to a software emulation provided by the generic watchdog package instead. This may prove useful during debugging.

If the hardware watchdog is enabled then CYGIMP_DEVS_WATCHDOG_MCFxxxx_ATTEMPT_RESET controls whether the driver will install a non-maskable interrupt VSR which performs a reset, or an ordinary interrupt handler which calls into application code. The default is to attempt the reset.

The watchdog timeout is controlled by CYGNUM_DEVS_WATCHDOG_MCFxxxx_TICKS. It is measured in system clock ticks and only a limited number of values are available: 29, 211, 213, 215, 219, 223, 227 and 231. The default is 227 clock ticks. For a processor running at 64MHz that corresponds to just over two seconds. With the same clock 223 ticks would give 0.13 seconds and 231 would give 33 seconds. For convenience there is a calculated configuration option CYGNUM_DEVS_WATCHDOG_MCFxxxx_DELAY which gives the actual delay in nanoseconds.

If the watchdog is configured to generate an ordinary interrupt rather than attempt a reset then CYGNUM_DEVS_WATCHDOG_MCFxxxx_ISR_PRIORITY determines the interrupt priority. The default will be provided by the processor HAL.


The watchdog device driver usually does not require any platform-specific support. The only porting effort required is to list CYGPKG_DEVS_WATCHDOG_MCFxxxx as one of the hardware packages in the ecos.db target entry. However if the driver has been configured to generate a reset then it will use HAL_VSR_SET to install a custom VSR cyg_mcfxxxx_watchdog_vsr. On platforms where the exception vectors are in flash and hence read-only this will be a problem and the function will have to be placed in the appropriate slot instead of hal_m68k_interrupt_vsr.

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