This driver's top-level chip support is currently provided as two files:
Prototypes the low-level chip access functions required by the chip driver and declares a private struct for use by the driver.
Implements high-level chip functions and exposes them via the
CYG_NAND_FUNSmacro. This file is not intended to be compiled on its own, but to be included by the source file in a platform HAL which implements the low-level functions.
A platform HAL would typically make use of this driver in a single source file with the following steps:
Declare a local private struct with contents as appropriate,
implement the required low-level functions,
declare a list of the supported
k9_subtypewhich may appear on the board, terminated by
declare a static instance of the
k9_privstruct containing pointers to that list and to an instance of the local-private struct
finally, instantiate the chip with the
CYG_NAND_DEVICEmacro, selecting the ECC and OOB semantics to use.
Note: If there is more than one chip on the board, each needs its own CYG_NAND_DEVICE with a distinct name and device name, its own instance of the k9_priv struct.
For more details about the infrastructure provided by the NAND layer and the semantics it expects of the chip driver, refer to Chapter 51. An example driver instantiation can be found in the NAND driver for the EA LPC2468 platform.
As discussed in the Section called High-level (chip) functions in Chapter 53, the chip
initialisation function must set up the
pointer in the cyg_nand_device struct. This driver does so
by including a large byte array in the k9_priv
struct whose size is controlled by CDL depending on the enabled
That struct is intended to be allocated as a static struct in the
data or BSS segment (one per chip), which avoids adding a dependency
These functions are prototyped in
They have no return value ("void"), except for
read_data_1 which returns the byte it has read.
Writes a single command byte to the chip's command latch.
write_addrbytes(device, pointer to bytes, number of bytes)
Writes a number of address bytes in turn to the chip's address latch.
read_data_bulk(device, output pointer, number of bytes)
Reads data from the device, respectively a single byte and in bulk.
write_data_bulk(device, data pointer, number of bytes)
Writes data to the device, respectively a single byte and in bulk.
wait_ready_or_time(device, initial delay, fallback time)
Wait for the chip to signal READY line or, if this line is not available, fall back to a worst-case time delay (measured in microseconds).
Wait for the chip to signal READY line or, if this line is not available, enter a loop waiting for its Status register (ANDed with the given mask) to be non-zero.
Hooks for any board-specific locking which may be required in addition to the NAND library's chip-level locking. (This would be useful if, for example, access to multiple chips was mediated by a single set of GPIO lines which ought not to be invoked concurrently.)
Board-level platform initialisation hook. This is called very early on in the chip initialisation routine; it should set up any locking required by the devlock and devunlock functions, interrupts for the driver and any further lines required to access the chip as approprate. Once this has returned, the chip driver assumes that the platform is fully prepared for it to call the other chip access functions.
Board-level partition initialisation hook. This should set up the
partitionarray of the device struct in a way which is appropriate to the platform. For example, the partitions may be set as fixed ranges of blocks, or by CDL. This is called at the end of the chip initialisation routine and may, for example, call into the chip to read out a "partition table" if one is present on the board. If you do not set up partitions, applications will not be able to use the high-level chip access functions provided the NAND library.