CYGPKG_HAL_CORTEXM_KINETIS_TWR_K60N512-- eCos Support for the Freescale TWR-K60N512 and TWR-K60D100M boards
The Freescale TWR-K60N512
and TWR-K60D100M boards are almost identical, so
provides support for both variants. The only functional differences
are whether a revision 1 or revision 2 Kinetis K60 sub-family CPU is
used, and a different on-board 3-axis accelerometer.
The TWR-K60N512 board has a MK60N512VMD100 revision 1 microcontroller and the TWR-K60D100M board has a MK60DN512VMD10 revision 2 microcontroller. Both microcontrollers incorporate 512KB of internal flash ROM and 128KB of internal SRAM.
In either case the stand-alone board may be targetted, but for access to some peripherals it is assumed that a TWR-ELEV setup, with a TWR-SER daughterboard is being used. For example, with a TWR-SER board present it provides a connector for Ethernet. The motherboards have limited I/O interfaces, with most of the I/O signals being propogated via multi-pin connectors.
The motherboards also provide an on-board JTAG debug circuit (OSJTAG) with virtual serial port, a 3-axis accelerometer, a potentiometer, a MicroSD card slot, and some LEDs and buttons.
The TWR-SER daughterboard also provides in addition to the Ethernet connector access to a RS232/484 DB9 connection, a USB Mini-AB connector and a 3-pin CAN connector.
For these boards, the expected eCos development model is that programs may be downloaded and debugged via the on-board OSJTAG USB interface, or via a hardware debugger (JTAG/SWD) attached to the JTAG socket. However, if required, it is possible to build and install RedBoot or a GDB stub image into the internal FLASH so that the CPU boots directly into that monitor, and that the GDB debugger accesses the monitor via serial or Ethernet.
This documentation describes platform-specific elements of the TWR-K60N512 and TWR-K60D100M board support within eCos. The Kinetis variant HAL documentation covers various topics including HAL support common to Kinetis variants, and on-chip device support. This document complements the Kinetis documentation.
The K60 parts used have two on-chip memory regions. There is a SRAM region of 128KiB present at 0x1FFF0000 and a 512KiB FLASH region present at 0x00000000.
The Kinetis variant HAL includes support for the six on-chip serial devices which are documented in the variant HAL. For these boards UART3 is connected to the J8 DB9 connector, with hardware flow control (RTS/CTS) lines available. Additionally UART5 is connected as a virtual serial through the on-board OSJTAG J13 USB connection, without support for hardware flow control lines.
Device drivers are provided for the Kinetis on-chip Ethernet MAC, I²C interface and SPI interface. Additionally support is provided for the on-chip watchdog, RTC (wallclock) and a flash driver exists to permit management of the Kinetis's on-chip flash.
The Kinetis K60 processor, and the TWR-K60N512/TWR-K60D100M platforms, provide a wide variety of peripherals, but unless support is specifically indicated it should be assumed that support is not included.
The board port is intended to work with GNU tools configured for an arm-eabi target. The original port was done using arm-eabi-gcc version 4.7.3a, arm-eabi-gdb version 7.6, and binutils version 2.23.2.