STM324X9I-EVAL Platform HAL

Name

CYGPKG_HAL_CORTEXM_STM32_STM324X9I_EVAL -- eCos Support for the STM324X9I-EVAL Board

Description

This documentation describes the platform-specific elements of the STM324X9I-EVAL board support within eCos. It should be read in conjunction with the STM32 variant HAL section, which covers the common functionality shared by all STM32 variants, including eCos HAL features and on-chip device support. In addition ST's "STM32429I-EVAL evaluation board for the STM32F429 line" (ST User Manual id: UM1667) should be consulted for hardware setup and settings.

The board is equipped with an on-board ST-LINK/V2 hardware debugger interface (via the CN21 “USB ST-LINK” connector), which is typically used for eCos application development. Alternatively the CN13 trace and CN16 JTAG/SWD connectors are available for connecting off-board hardware debuggers.

Supported Hardware

The STM32F429NI has three main on-chip memory regions. The device has a SRAM region of 192KiB present at 0x20000000, and a 2MiB FLASH region present at 0x08000000 (which is aliased to 0x00000000 during normal execution). There is another on-chip RAM region of 64KiB present at 0x10000000 that is only accessible via the CPU core. Also, the STM324X9I-EVAL motherboard has 32MiB of SDRAM memory mapped to address 0x80000000, 2MiB of SRAM memory mapped to address 0x64000000 and 16MiB of NOR-flash memory mapped to address 0x60000000.

Warning

Prior to silicon Rev3 an errata exists that precludes concurrent use of static and dynamic FMC memories. The eCos STARTUP type configures which RAM is used for the main application memory, and eCos does not provide any specific workaround. How the non-eCos memory is used is the domain of the application.

For example, if developing applications for silicon revisions that exhibit the problem then if the memory-mapped NOR flash is required a STARTUP selecting the off-chip PSRAM should be configured, and the off-chip SDRAM not accessed.

When targeting this STM324x9I-EVAL platform where an early chip revision is present then the STM32 variant option CYGHWR_HAL_CORTEXM_STM32_F42_ERRATA_FMC_BANKSWITCH can be enabled. This will ensure that the external NOR flash definitions are NOT provided for STARTUP types where SDRAM is selected for use. Alternatively the application developer is free to leave this ERRATA option disabled and use run-time logic to ascertain the chip revision from the relevant I/O registers. The application code can then allow NOR flash access as appropriate.

The STM32 variant HAL includes support for the eight on-chip serial devices which are documented in the variant HAL. However, the STM324X9I-EVAL motherboard only provides a single standard DB9 UART connector CN8.

The STM32 variant HAL also includes support for the I²C buses. A single I²C device is instantiated as part of the platform port, which is for the STMPE811 touch-panel sensor connected via bus I²C1. It is exported to <cyg/io/i2c.h> with the name hal_stm324x9i_eval_touchpanel in the normal way.

Similarly the STM32 variant HAL includes support for the SPI buses. Though the evaluation board does not provide any SPI devices as standard.

USB host and peripheral modes are supported on both the FS OTG1 (connector CN14) and HS OTG2 (connector CN9) controllers available on the evaluation board. The HS OTG2 controller support is currently limited to use at FS speed only. Consult the STM32 variant HAL documentation for USB driver details.

Note: The evaluation board does not support the use of the FS OTG2 (connector CN15) without a hardware modification detailed in the ST evaluation board user manual.

Device drivers are also provided for the STM32 on-chip Ethernet MAC, ADC, BXCAN and SDIO interfaces. Additionally, support is provided for the on-chip watchdog, RTC (wallclock) and a Flash driver exists to permit management of the STM32's on-chip Flash.

Note: The STM32 variant HAL support for the SDIO interface is currently limited to supporting MMC/SD cards. If the multi-bit MMC/SD support is used it is recommended that on-chip SRAM transfer buffers are used to avoid RX overrun or TX underrun due to the slow external SDRAM access speed.

The STM32F4 processor and the STM324X9I-EVAL board provide a wide variety of peripherals, but unless support is specifically indicated, it should be assumed that it is not included.

Tools

The board port is intended to work with GNU tools configured for an arm-eabi target. The original port was done using arm-eabi-gcc version 4.7.3e, arm-eabi-gdb version 7.6.1, and binutils version 2.23.2.

2017-02-09
Documentation license for this page: eCosPro License