The STM32 variant HAL contains some test programs which allow
various aspects of the microcontroller or the architecture to be
tested.
Timers Test
The timers test checks the functionality of the
microcontroller timers and in particular the interrupt priority
and nesting mechanisms. The test programs all the available timers
to interrupt at a variety of different rates and records various
parameters. The timers are programmed to interrupt at higher rates
for lower numbered timers, and higher rate timers are given higher
priority. The test outputs a sequence of tables of the following
format:
The first line shows the depth of ISR nesting seen since the last
report, plus the maximum seen throughout the run.
The first table contains a row for each timer. The
Ticks column shows the total number of ISRs
called for this timer. The 0 column shows how
many ISR calls interrupted thread state. The remaining columns
show how many ISR calls preempted the ISR for the given timer. For
example, the ISR for timer 1 preempted the ISR for timer 6 60741
times.
The second table contains two rows for each timer. The
preempt: row shows how many times the ISR
preempted the DSR for the given timer. The zero column correspond
to thread state as before. For example the ISR for timer 2
preempted the DSR for timer 4 75 times. The
count: row shows the range of
count values passed to the DSR and indicate the
number of DSR calls not matched exactly to ISR calls. The ISR
calls the DSR every 10 ticks, so the total counts should be one
tenth of the ISR Ticks value.