On-chip Subsystems and Peripherals

Name

On-chip Subsystems and Peripherals -- Hardware Support

Hardware support

On-chip memory

The ST STR7XX parts include on-chip SRAM, and on-chip FLASH. The RAM consists of a single 64KiB block. The FLASH comprises a block of program memory which is either 64KiB, 128KiB or 256KiB in size depending on model, plus a 16KiB area of higher durability data memory. There is also support in some models for external SRAM and flash, which eCos may use where available.

Typically, an eCos platform HAL port will expect a GDB stub ROM monitor or RedBoot image to be programmed into either the external FLASH or the STR7XX on-chip ROM memory for development, and the board would boot this image from reset. The stub ROM/RedBoot provides GDB stub functionality so it is then possible to download and debug stand-alone and eCos applications via the gdb debugger using serial interfaces or other debug channels. The JTAG interface may also be used for development if a suitable JTAG device is available. If RedBoot is present it may also be used to manage the on-chip and external flash memory. For production purposes, applications are programmed into the external or on-chip ROM and will be self-booting.

Serial I/O

The STR7XX variant HAL supports basic polled HAL diagnostic I/O over any of the on-chip serial devices. There is also a fully interrupt-driven serial device driver suitable for eCos applications for all on-chip serial devices. The serial driver consists of an eCos package: CYGPKG_IO_SERIAL_ARM_STR7XX which provides all support for the STR7XX on-chip serial devices. Using the HAL diagnostic I/O support, any of these devices can be used by the ROM monitor or RedBoot for communication with GDB. If a device is needed by the application, either directly or via the serial driver, then it cannot also be used for GDB communication using the HAL I/O support. An alternative serial port should be used instead.

The STR7XX UARTs only provide the minimal TX and RX data lines; hardware flow control using RTS/CTS is not supported. The eCos device drivers have been extended to permit the use of a pair of GPIO lines as flow control lines. It is the responsibility of the platform HAL to enable this functionality and define the GPIO lines to be used in this way.

I2C Support

The I²C® driver uses the STR7XX's internal support. This is controlled within the STR7XX variant HAL. The CYGPKG_HAL_STR7XX_I2C CDL component controls whether the I2C driver is enabled. Within that component, there are two sub-options:

  • CYGNUM_HAL_STR7XX_I2C_BUS0_CLOCK sets the speed of the I2C bus 0 clock in Hz. This is usually 100kHz, but can be set up to 400kHz (fast mode) if the devices on the bus support this speed. Other values below 400kHz can also be chosen, subject to the accuracy of the clock waveform generation parameters.

  • CYGNUM_HAL_STR7XX_I2C_BUS1_CLOCK sets the speed of the I2C bus 1 clock in Hz. This is usually 100kHz, but can be set up to 400kHz (fast mode) if the devices on the bus support this speed. Other values below 400kHz can also be chosen, subject to the accuracy of the clock waveform generation parameters.

The I2C driver is accessed via the generic I2C driver package CYGPKG_IO_I2C. Documentation for its API may be found elsewhere.

This driver only operates in interrupt mode. It does not operate in polled mode, and thus does not operate when interrupts are disabled. It cannot therefore be used in an initialization context, before the eCos kernel thread scheduler starts, and it cannot be used with RedBoot.

Watchdog

A device driver is included for the on-chip watchdog device. This driver allows the use of the standard eCos watchdog API accessible with the CYGPKG_IO_WATCHDOG eCos package. If the watchdog is not reset within a time period defined in the watchdog device driver CDL, then the system is automatically reset.

The watchdog device is also used to implement reset functionality, it may also be called directly by applications using the following function:

#include <cyg/hal/hal_diag.h>
extern void hal_str7xx_reset_cpu(void);

Interrupt controller

eCos manages the on-chip Enhanced Interrupt Controller (EIC). The EIC is configured to use interrupts in non-vectored mode, although the vector mechanism is used to aid interrupt source decoding. External interrupts controlled by the XTI unit are also decoded into individual vectors.

Timer 0 is used to implement the eCos system clock. Timer-based profiling support is implemented using timer 1. If the gprof package, CYGPKG_PROFILE_GPROF, is included in the configuration, then timer 1 is reserved for use by the profiler. Timers 2 and 3 are free for use by applications.

Other

Other on-chip devices (SPI, USB, CAN, HDLC etc.) are not touched by the STR7XX variant HAL and unless used by the platform HAL are free for use for applications.

2017-02-09
Documentation license for this page: eCosPro License