The HAL Port

Name

HAL Port -- Implementation Details

Overview

This documentation explains how the eCos HAL specification has been mapped onto the AT91SAM9261-EK hardware, and should be read in conjunction with that specification. The AT91SAM9261-EK platform HAL package complements the ARM architectural HAL, the ARM9 variant HAL and the SAM9 processor HAL. It provides functionality which is specific to the target board.

Startup

Following a hard or soft reset, the HAL will initialize or reinitialize most of the on-chip peripherals. There is an exception for RAM startup applications which depend on a ROM monitor for certain services.

For ROM startup, the HAL will perform additional initialization. This is all done in the PLATFORM_SETUP1 macro in the assembler header file hal_platform_setup.h.

Linker Scripts and Memory Maps

The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:

SDRAM

This is located at address 0x20000000 of the physical memory space. The HAL configures the MMU to retain the SDRAM at virtual address 0x20000000, but in order to assign hardware exception vectors at address 0x00000000, the HAL also uses the MMU to create a clone of this memory at virtual address 0x00000000. The same memory is also accessible uncached and unbuffered at virtual location 0x30000000 for use by devices. The first 32 bytes are used for hardware exception vectors. The next 32 bytes are used for the VSR table and the next 256 bytes are normally used for the eCos virtual vectors, allowing RAM-based applications to use services provided by the ROM monitor. Memory is required for the MMU tables, and must be aligned on a 16Kbyte boundary. These therefore occupy memory from 0x4000 to 0x8000. For ROM startup, all remaining SDRAM is available. For RAM startup, available RAM starts at virtual location 0x20040000, with the bottom 256kB reserved for use by RedBoot.

On-chip SRAM

This is located at address 0x00200000 of the physical memory space. However the HAL uses the MMU to relocate this to virtual address 0x70000000. The same memory is also accessible uncached and unbuffered at virtual location 0x70100000 for use by devices. At present this memory is unused by eCos and is available for application use.

On-chip ROM

This is located at address 0x00100000 of the physical memory space. However the HAL uses the MMU to relocate this to virtual address 0x71000000. The same memory is also accessible uncached and unbuffered at virtual location 0x71800000.

USB host port

The USB host port (UHP) registers are located at address 0x00300000 of the physical memory space. However the HAL uses the MMU to relocate this to virtual address 0x72800000. Memory accessed at this address is uncached and unbuffered. There is no cached variant.

SPI dataflash

SPI Dataflash media can only be accessed with the Flash API. For the purposes of this API a placeholder address range has been allocated as if the Flash is present at this address. The base of this address range is 0x40000000 for the on-board flash and 0x50000000 for the dataflash slot, the extent will clearly depend on the Dataflash capacity. This reserved range is not real memory and any attempt to access it directly by the processor other than via the Flash API will result in a memory address exception.

On-chip Peripheral Registers

These are located at address 0xFF000000 in the physical memory space. When the MMU is enabled, it sets up a direct, uncached, unbuffered mapping so that these registers remain accessible at their physical locations.

DM9000 Ethernet Device

This is located on chip select 2 of the static memory controller and is visible at physical address 0x30000000. The HAL uses the MMU to relocate this to 0x80000000 in the virtual memory space.

Off-chip Peripherals

eCos uses the SDRAM, MCI, and SPI dataflash facilities on the AT91SAM9261-EK board. eCos does not currently make any use of any other off-chip peripherals present on this board.

Advanced Interrupt Controller

This port has been designed to exploit benefits of the Advanced Interrupt Controller of the AT91SAM9261, using the facilities of the SAM9 processor HAL. Consult the documentation in that package for details.

SPI Dataflash

eCos supports SPI access to Dataflash on the AT91SAM9261. An on-board device and an external card slot are provided on the board. The on-chip device is typically used to contain RedBoot and flash configuration data. The external slot is available for application use.

Accesses to Dataflash are performed via the Flash API, using 0x40000000 or 0x50000000 as the nominal address of the device, although it does not truly exist in the processor address space. For the external card slot, on driver initialisation, eCos and RedBoot can detect the presence of a card in the socket. In particular, on reset RedBoot will indicate the presence of Flash at the 0x40000000 address range in its startup banner if it has been successfully detected. Hot swapping is not possible.

Since Dataflash is not directly addressable, access from RedBoot is only possible using fis command operations.

RedBoot or applications can also be booted from the Dataflash card socket, as well as from the on-board Dataflash device. Booting from the Dataflash card socket can be performed by switching jumper J21 from pins 1-2 closed, to pins 2-3 closed. When booting RedBoot or applications in this way, you must enable the SAM9261-EK platform HAL configuration option "SPI chip select #0 is socket" (CYGHWR_HAL_ARM_ARM9_SAM9261EK_DATAFLASH_NPCS0_SOCKET) found within the "External Atmel AT49xxxx DataFlash memory support" component. Failure to do so will not just render the Dataflash card inaccessible after booting, but is likely to cause permanent damage to the AT91SAM9261.

Once an appropriately configured "ROM" startup image has been built, it can be converted to raw binary format using arm-eabi-objcopy. You must then copy an AT91Bootstrap second stage boot loader binary image to the beginning (offset 0) of the card, and then the RedBoot/application image at offset 0x8000 on the card.

Programming on the card can be performed with SAM-BA, an external programmer, or with a standard build of RedBoot booted from the on-board Dataflash. An example of using an installed RedBoot loaded from on-board Dataflash to program the card would be as follows. Note the two Flash memories detected by RedBoot, as shown in the version output. The first is the on-board Dataflash part, the second is the Dataflash located in the card socket.

RedBoot> version

RedBoot(tm) bootstrap and debug environment [ROM]
Non-certified release, version UNKNOWN - built 15:10:18, Nov  2 2007

Platform: SAM9261-EK (ARM9)
Copyright (C) 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
Copyright (C) 2003, 2004, 2005, 2006, 2007 eCosCentric Limited

RAM: 0x20000000-0x24000000, [0x200305d0-0x23ffef80] available
FLASH: 0x40000000-0x4083ffff, 8192 x 0x420 blocks
FLASH: 0x50000000-0x5083ffff, 8192 x 0x420 blocks
RedBoot> fis list
Name              FLASH addr  Mem addr    Length      Entry point
(reserved)        0x40000000  0x40000000  0x00008000  0x00000000
RedBoot           0x40008000  0x20030800  0x00028380  0x20030800
RedBoot config    0x4083F7C0  0x4083F7C0  0x00000420  0x00000000
FIS directory     0x4083FBE0  0x4083FBE0  0x00000420  0x00000000
RedBoot> fis load -b %{freememlo} (reserved)
RedBoot> fis write -b %{freememlo} -f 0x50000000 -l 0x8000
* CAUTION * about to program FLASH
            at 0x50000000..0x500083ff from 0x20030800 - continue (y/n)? y
... Erase from 0x50000000-0x500083ff: ................................
... Program from 0x20030800-0x20038c00 to 0x50000000: ................................
RedBoot> load -r -m tftp -b %{freememlo} /sam9261ek/redboot.bin
Raw file loaded 0x20030800-0x2004f3a3, assumed entry at 0x20030800
RedBoot> fis write -b %{freememlo} -f 0x50008000 -l 0x28380
* CAUTION * about to program FLASH
            at 0x50008000..0x5003037f from 0x20030800 - continue (y/n)? y
... Erase from 0x50007fe0-0x5003037f: ......................................................................................................
... Program from 0x20030800-0x20058b80 to 0x50008000: ......................................................................................
RedBoot>
      

After this, the board can be powered off, jumper J21 switched to pins 2-3, and the board powered up again. The application or RedBoot will then boot from the Dataflash card.

The MCI driver cannot be enabled simultaneously with the SPI driver, as the drivers need differing pin configurations for the same pins on this board due to the shared socket.

Real-time characterization

The tm_basic kernel test gives statistics gathered about the real-time characterization and performance of the kernel. The sample output is shown here for information. The test was built in ARM mode, which provided better performance than Thumb mode.

            Startup, main stack : stack used   420 size  3920
             Startup :  Interrupt stack used   536 size  4096
             Startup : Idlethread stack used    80 size  2048

eCos Kernel Timings
Notes: all times are in microseconds (.000001) unless otherwise stated

Reading the hardware clock takes 1 'ticks' overhead
... this value will be factored out of all other measurements
Clock interrupt took    6.37 microseconds (39 raw clock ticks)

Testing parameters:
   Clock samples:            32
   Threads:                  64
   Thread switches:         128
   Mutexes:                  32
   Mailboxes:                32
   Semaphores:               32
   Scheduler operations:    128
   Counters:                 32
   Flags:                    32
   Alarms:                   32


                                 Confidence
     Ave     Min     Max     Var  Ave  Min  Function
  ======  ======  ======  ====== ========== ========
    4.95    3.38    6.44    0.81   48%  26% Create thread
    0.84    0.81    1.93    0.06   85%  85% Yield thread [all suspended]
    1.04    0.97    2.26    0.10   98%  64% Suspend [suspended] thread
    0.95    0.81    1.61    0.07   65%  23% Resume thread
    1.35    1.13    3.87    0.12   92%   6% Set priority
    0.26    0.16    0.64    0.10   92%  50% Get priority
    2.98    2.58    8.05    0.24   87%  39% Kill [suspended] thread
    0.85    0.81    1.61    0.07   79%  79% Yield [no other] thread
    1.48    1.29    2.42    0.09   64%  12% Resume [suspended low prio] thread
    0.93    0.81    1.13    0.07   65%  29% Resume [runnable low prio] thread
    1.17    0.97    1.93    0.09   62%  10% Suspend [runnable] thread
    0.84    0.81    1.61    0.05   87%  87% Yield [only low prio] thread
    0.88    0.81    1.29    0.09   93%  59% Suspend [runnable->not runnable]
    2.85    2.58    6.60    0.18   81%  68% Kill [runnable] thread
    2.16    1.93    4.67    0.15   75%  17% Destroy [dead] thread
    3.92    3.70    6.77    0.16   68%  70% Destroy [runnable] thread
    5.76    5.32   10.15    0.29   81%  32% Resume [high priority] thread
    2.02    1.93    4.19    0.10   98%  54% Thread switch

    0.21    0.16    0.64    0.07   74%  74% Scheduler lock
    0.69    0.64    1.29    0.07   75%  75% Scheduler unlock [0 threads]
    0.69    0.64    0.97    0.06   74%  74% Scheduler unlock [1 suspended]
    0.65    0.64    0.81    0.00   99%  99% Scheduler unlock [many suspended]
    0.68    0.64    0.97    0.05   79%  79% Scheduler unlock [many low prio]

    0.31    0.16    1.29    0.08   71%  25% Init mutex
    1.03    0.81    2.58    0.14   84%  12% Lock [unlocked] mutex
    1.13    0.97    2.58    0.09   68%  28% Unlock [locked] mutex
    0.92    0.81    1.93    0.11   50%  46% Trylock [unlocked] mutex
    0.82    0.81    0.97    0.02   93%  93% Trylock [locked] mutex
    0.20    0.16    0.64    0.07   81%  81% Destroy mutex
    5.06    4.99    6.44    0.12   93%  90% Unlock/Lock mutex

    0.42    0.32    1.61    0.12   96%  62% Create mbox
    0.33    0.16    1.13    0.11   50%  28% Peek [empty] mbox
    1.08    0.97    2.26    0.12   93%  53% Put [first] mbox
    0.19    0.16    0.64    0.05   90%  90% Peek [1 msg] mbox
    1.03    0.97    1.93    0.10   96%  75% Put [second] mbox
    0.18    0.16    0.32    0.04   87%  87% Peek [2 msgs] mbox
    1.08    0.97    2.26    0.12   93%  56% Get [first] mbox
    1.03    0.97    1.45    0.09   65%  65% Get [second] mbox
    0.89    0.81    1.61    0.10   96%  59% Tryput [first] mbox
    0.88    0.81    1.93    0.11   96%  71% Peek item [non-empty] mbox
    0.97    0.81    1.77    0.06   78%  15% Tryget [non-empty] mbox
    0.85    0.81    1.13    0.07   75%  75% Peek item [empty] mbox
    0.91    0.81    1.77    0.11   96%  53% Tryget [empty] mbox
    0.19    0.16    0.32    0.04   84%  84% Waiting to get mbox
    0.19    0.16    0.48    0.05   84%  84% Waiting to put mbox
    0.41    0.32    1.29    0.11   96%  62% Delete mbox
    3.59    3.38    6.60    0.19   65%  96% Put/Get mbox

    0.26    0.16    0.81    0.09   50%  46% Init semaphore
    0.84    0.64    1.77    0.07   84%   6% Post [0] semaphore
    0.92    0.81    1.93    0.11   50%  46% Wait [1] semaphore
    0.82    0.64    1.45    0.05   87%   6% Trywait [0] semaphore
    0.82    0.81    1.29    0.03   96%  96% Trywait [1] semaphore
    0.28    0.16    0.81    0.09   59%  37% Peek semaphore
    0.20    0.16    0.48    0.06   78%  78% Destroy semaphore
    3.29    3.06    5.15    0.13   90%   3% Post/Wait semaphore

    0.43    0.32    1.61    0.12   96%  53% Create counter
    0.29    0.16    0.64    0.11   40%  43% Get counter value
    0.20    0.16    0.64    0.07   81%  81% Set counter value
    0.97    0.81    1.61    0.05   81%  12% Tick counter
    0.20    0.16    0.48    0.06   81%  81% Delete counter

    0.26    0.16    0.97    0.10   96%  50% Init flag
    0.91    0.81    2.09    0.12   96%  59% Destroy flag
    0.76    0.64    1.29    0.09   59%  37% Mask bits in flag
    0.91    0.81    1.45    0.10   46%  46% Set bits in flag [no waiters]
    1.28    1.13    2.58    0.09   65%  31% Wait for flag [AND]
    1.23    1.13    1.61    0.09   46%  46% Wait for flag [OR]
    1.26    1.13    1.77    0.08   65%  28% Wait for flag [AND/CLR]
    1.24    1.13    1.77    0.09   56%  40% Wait for flag [OR/CLR]
    0.17    0.16    0.32    0.02   93%  93% Peek on flag

    0.60    0.48    2.09    0.13   96%  53% Create alarm
    1.67    1.45    3.87    0.25   84%  65% Initialize alarm
    0.87    0.81    1.93    0.10   81%  81% Disable alarm
    1.41    1.29    3.22    0.15   93%  59% Enable alarm
    0.97    0.81    1.93    0.07   75%  18% Delete alarm
    1.09    0.97    1.61    0.08   62%  34% Tick counter [1 alarm]
    4.89    4.83    5.32    0.08   71%  71% Tick counter [many alarms]
    1.87    1.77    3.06    0.12   96%  62% Tick & fire counter [1 alarm]
   29.72   29.64   30.44    0.10   96%  59% Tick & fire counters [>1 together]
    5.67    5.64    6.28    0.05   90%  90% Tick & fire counters [>1 separately]
    5.81    5.80    7.25    0.02   98%  98% Alarm latency [0 threads]
    5.87    5.80    7.89    0.13   91%  88% Alarm latency [2 threads]
    9.28    8.22   11.28    0.58   49%  30% Alarm latency [many threads]
    8.91    8.86   13.05    0.09   96%  96% Alarm -> thread resume latency

    1.66    1.45    3.54    0.00            Clock/interrupt latency

    2.40    1.93    5.15    0.00            Clock DSR latency

   33      0     312  (main stack:  1416)  Thread stack used (8016 total)
           All done, main stack : stack used  1416 size  3920
            All done :  Interrupt stack used   208 size  4096
            All done : Idlethread stack used   804 size  2048

Timing complete - 30040 ms total

PASS:<Basic timing OK>
EXIT:<done>
    

Other Issues

The AT91SAM9261-EK platform HAL does not affect the implementation of other parts of the eCos HAL specification. The SAM9 processor HAL, ARM9 variant HAL, and the ARM architectural HAL documentation should be consulted for further details.

2017-02-09
Documentation license for this page: eCosPro License