Overview

Name

eCos Support for the Phytec phyCORE LPC2294 Board -- Overview

Description

The Phytec phyCORE LPC2294 Board is fitted with a Philips LPC2294 processor rated to 60MHz, which contains up to 64KB of SRAM and up to 256KB of FLASH. When used in conjunction with the phyCORE HD200 development board, it provides two 9-pin RS-232 serial interfaces connected to the LPC2294 on-chip UARTs, a single LED, two CAN interfaces and an SMSC LAN91C111 ethernet interface. Refer to the board documentation for full details.

For typical eCos development, a RedBoot image is programmed into the LPC2294 on-chip flash memory, and the board will boot this image from reset. RedBoot provides gdb stub functionality so it is then possible to download and debug stand-alone and eCos applications via the gdb debugger using UART 0 or via the ethernet.

This documentation describes platform-specific elements of the phyCORE LPC2294 Board support within eCos. Documentation on the Philips LPC2xxx variants is available separately, and should be read in conjunction with this documentation. The LPC2xxx documentation covers various topics including HAL support common to LPC2xxx variants, and on-chip device support. This document complements the LPC2xxx documentation.

Supported Hardware

The phyCORE LPC2294 Board has 128Kbyte of on-chip Flash memory. In a typical setup, RedBoot will load and run from this internal flash. An initial image must be programmed into this flash using either the FlashMagic utility, or via a JTAG debugger. Following this, it may be reprogrammed using flash drivers in RedBoot.

The first 64 bytes of on-chip SRAM are mapped by the HAL startup code using the LPC2294 memory mapping control to location 0x00000000 for speed of interrupt vector processing. The rest of SRAM is available for use by the application. One MByte of SRAM is available at 0x81000000; the first 64KBytes of this is reserved for use by RedBoot, the rest is available for the code and data of loaded applications.

The Philips LPC2xxx variant HAL includes support for the two on-chip serial devices and is documented in the variant HAL. The interrupt-driven serial driver supports the line status and modem control (including hardware handshaking) lines on UART1 only. These handshaking lines are not accessible at the DB9 connector (P1B).

The phyCORE LPC2294 Board port includes support for the on-chip watchdog, RTC (wallclock), and interrupt controller (VIC). This support is documented in the LPC2xxx variant HAL.

The SMSC LAN91C111 ethernet MAC is supported. However, due to PCB tracking problems, it is only capable of running at 10MBit/s and the driver forces the device to only operate at that speed.

Tools

The phyCORE LPC2294 Board port is intended to work with GNU tools configured for an arm-eabi target. Thumb mode is supported. The original port was done using arm-elf-gcc version 3.3.3, arm-elf-gdb version 6.1, and binutils version 2.14.

2017-02-09
Documentation license for this page: eCosPro License