This documentation explains how the eCos HAL specification has been
mapped onto the phyCORE LPC2294 Board hardware, and should be read in
conjunction with that specification. The phyCORE LPC229x
platform HAL package complements the ARM architectural HAL and the
LPC2xxx variant HAL. It provides functionality which is specific to
the target board.
Startup
Following a hard or soft reset the HAL will initialize or reinitialize
many of the on-chip peripherals. This includes the PINSEL functions
and LED bank. There is an exception for RAM startup applications which
depend on a ROM monitor for certain services.
For ROM startup, the HAL will perform additional initialization,
programming the various internal registers including PLL (for the
clocks); Memory Mapping control registers to map SRAM to 0x0; the
memory controller for access to external FLASH, SRAM and ethernet; and
the Memory Acceleration Module (MAM). The details of the early
hardware startup may be found in the header cyg/hal/hal_platform_setup.h.
Linker Scripts and Memory Maps
The platform HAL package provides the memory layout information needed
to generate the linker script. The key memory locations are as follows:
on-chip Flash
This is located at address 0x0 of the memory space, although
after hardware initialization, the start of internal SRAM is mapped over
locations 0x0 to 0x40. This region ends at 0x40000. The MAM is enabled to
accelerate memory reads from this area. A driver is available for using this
flash via the eCos flash API.
external Flash
This is located at address 0x80000000 of the memory space. It is not
used by default by eCos, although if RedBoot is asked to manage the
Flash, it reserves flash addresses 0x801E0000 thru 0x801FF000. If
RedBoot stores its configuration data in Flash, then addresses
0x801FF000 thru 0x801FFFFF are reserved by RedBoot. RedBoot also
reserves the first block of Flash at 0x80000000 thru 0x80001FFFF
to ensure that it remains erased and does not therefore inhibit
the execution of RedBoot from the internal Flash. External flash
is 32bits wide and accessed with 7 wait states.
internal SRAM
This is located at address 0x40000000 of the memory space, ending at
location 0x40004000. The first 64 bytes are mapped to location
0x0000000.
external SRAM
This is located at address 0x81000000 of the memory space, ending at
location 0x81100000. For RAM startup, available SRAM starts at
location 0x81010000, with the bottom 64Kbytes reserved for use by
RedBoot.
on-chip peripherals
These are accessible via location 0xE0000000 onwards. Descriptions
of the contents can be found in the LPC2294 User Manual.
Other Issues
The LEDs may be accessed from C with the following
function:
Values from 0 to 16 will be displayed on the LED bank representing the binary value
with 1 being on and 0 being off, and with P0.7 being the MSB, and P0.4 the LSB.
The LEDs are also used during platform initialization and only P0.4 should be illuminated
if booting has been successful. Other LED indications represent the stage in the initialization
process that failed.
