The HAL Port


HAL Port -- Implementation Details


This documentation explains how the eCos HAL specification has been mapped onto the MCB2387 board hardware, and should be read in conjunction with that specification. The LPC2387 platform HAL package complements the ARM architectural HAL and the LPC2xxx variant HAL. It provides functionality which is specific to the target board.


Following a hard or soft reset the HAL will initialize or reinitialize many of the on-chip peripherals. There is an exception for RAM startup applications which depend on a ROM monitor to do most of this and for JTAG startup, where some initialization will be done by the JTAG device.

For ROM startup, the HAL will perform additional initialization, programming the various internal registers including PLL (for the clocks); Memory Mapping control registers to map SRAM to 0x0 and the Memory Acceleration Module (MAM). The details of the early hardware startup may be found in the header cyg/hal/hal_platform_setup.h.

Linker Scripts and Memory Maps

The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:

on-chip Flash

This is located at address 0x0 of the memory space, although after hardware initialization, the start of internal SRAM is mapped over locations 0x0 to 0x40. This region ends at 0x80000. The MAM is enabled to accelerate memory reads from this area. A driver is available for using this flash via the eCos flash API.

internal SRAM

This is located at address 0x40000000 of the memory space, ending at location 0x4000FFFF. The first 64 bytes are mapped to location 0x0000000.

on-chip peripherals

These are accessible via location 0xE0000000 onwards. Descriptions of the contents can be found in the LPC2387 User Manual.

Documentation license for this page: eCosPro License