The HAL Port

Name

HAL Port -- Implementation Details

Overview

This documentation explains how the eCos HAL specification has been mapped onto the DNP/9200 and DNP/EVA9 hardware, and should be read in conjunction with that specification. The DNP/9200 with DNP/EVA9 platform HAL package complements the ARM architectural HAL, the ARM9 variant HAL and the AT91RM9200 processor HAL. It provides functionality which is specific to the target board.

Startup

Following a hard or soft reset, the HAL will initialize or reinitialize most of the on-chip peripherals. There is an exception for RAM startup applications which depend on a ROM monitor for certain services.

For ROM or ROMRAM startup, the HAL will perform additional initialization, setting up the external RAM and programming the various internal registers. This is all done in the PLATFORM_SETUP1 macro in the assembler header file hal_platform_setup.h.

Linker Scripts and Memory Maps

The platform HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:

Flash

This is located at address 0x10000000 of the physical memory space. The HAL uses the MMU to locate it at virtual address 0x60000000 after initialization. It remains accessible at address 0x1000000 but accesses to this address range are uncached.

SDRAM

This is located at address 0x20000000 of the physical memory space. The HAL configures the MMU to retain the SDRAM at virtual address 0x20000000, but in order to assign hardware exception vectors at address 0x00000000, the HAL also uses the MMU to create a clone of this memory at virtual address 0x00000000. The same memory is also accessible uncached and unbuffered at virtual location 0x30000000 for use by devices. The first 32 bytes are used for hardware exception vectors. The next 32 bytes are used for the VSR table and the next 256 bytes are normally used for the eCos virtual vectors, allowing RAM-based applications to use services provided by the ROM monitor. Memory is required for the MMU tables, and must be aligned on a 16Kbyte boundary. These therefore occupy memory from 0x4000 to 0x8000. For ROM/ROMRAM startup, all remaining SDRAM is available. For RAM startup, available RAM starts at virtual location 0x00100000, with the bottom 1MB reserved for use by RedBoot.

On-chip SRAM

This is located at address 0x00200000 of the physical memory space. However the HAL uses the MMU to relocate this to virtual address 0x70000000. The same memory is also accessible uncached and unbuffered at virtual location 0x70100000 for use by devices. At present this memory is entirely reserved for use by the ethernet interface, since there are problems using external SDRAM for ethernet buffers.

On-chip ROM

This is located at address 0x00100000 of the physical memory space. However the HAL uses the MMU to relocate this to virtual address 0x71000000. The same memory is also accessible uncached and unbuffered at virtual location 0x71800000.

USB host port

The USB host port (UHP) registers are located at address 0x00300000 of the physical memory space. However the HAL uses the MMU to relocate this to virtual address 0x72800000. Memory accessed at this address is uncached and unbuffered. There is no cached variant.

On-chip Peripheral Registers

These are located at address 0xFF000000 in the physical memory space. When the MMU is enabled, it sets up a direct, uncached, unbuffered mapping so that these registers remain accessible at their physical locations.

Off-chip Peripherals

eCos uses the SDRAM, parallel NOR flash, ethernet PHY of the DNP/9200 board. eCos does not currently make any use of any other off-chip peripherals present on this board.

Advanced Interrupt Controller

This port has been designed to exploit benefits of the Advanced Interrupt Controller of the AT91RM9200, using the facilities of the AT91RM9200 processor HAL. Consult the documentation in that package for details.

Real-time characterization

The tm_basic kernel test gives statistics gathered about the real-time characterization and performance of the kernel. The sample output is shown here for information. The test was built in ARM mode, which provided better performance than Thumb mode.

            Startup, main stack : stack used   416 size  3920
             Startup :  Interrupt stack used   524 size  4096
             Startup : Idlethread stack used    92 size  2048

eCos Kernel Timings
Notes: all times are in microseconds (.000001) unless otherwise stated

Reading the hardware clock takes 0 'ticks' overhead
... this value will be factored out of all other measurements
Clock interrupt took   13.69 microseconds (6 raw clock ticks)

Testing parameters:
   Clock samples:            32
   Threads:                  64
   Thread switches:         128
   Mutexes:                  32
   Mailboxes:                32
   Semaphores:               32
   Scheduler operations:    128
   Counters:                 32
   Flags:                    32
   Alarms:                   32


                                 Confidence
     Ave     Min     Max     Var  Ave  Min  Function
  ======  ======  ======  ====== ========== ========
   13.99    8.55   19.23    2.40   43%  26% Create thread
    2.10    0.00    4.27    0.13   95%   3% Yield thread [all suspended]
    2.64    2.14    6.41    0.78   78%  78% Suspend [suspended] thread
    2.90    2.14    4.27    0.98   64%  64% Resume thread
    3.71    2.14   10.68    0.98   67%  31% Set priority
    0.93    0.00    2.14    1.05   56%  56% Get priority
    8.11    6.41   19.23    0.96   70%  28% Kill [suspended] thread
    2.10    0.00    4.27    0.13   95%   3% Yield [no other] thread
    4.17    2.14    6.41    0.25   92%   6% Resume [suspended low prio] thread
    2.94    2.14    6.41    1.03   64%  64% Resume [runnable low prio] thread
    3.60    2.14    6.41    0.96   65%  32% Suspend [runnable] thread
    2.14    0.00    4.27    0.07   96%   1% Yield [only low prio] thread
    2.77    2.14    4.27    0.89   70%  70% Suspend [runnable->not runnable]
    7.68    6.41   19.23    1.23   50%  48% Kill [runnable] thread
    6.51    6.41   12.82    0.19   98%  98% Destroy [dead] thread
   10.75    8.55   21.37    0.46   87%   7% Destroy [runnable] thread
   15.19   12.82   25.64    0.57   90%   3% Resume [high priority] thread
    5.57    4.27   10.68    1.06   58%  40% Thread switch

    0.48    0.00    2.14    0.75   77%  77% Scheduler lock
    1.74    0.00    2.14    0.65   81%  18% Scheduler unlock [0 threads]
    1.78    0.00    2.14    0.59   83%  16% Scheduler unlock [1 suspended]
    1.78    0.00    2.14    0.59   83%  16% Scheduler unlock [many suspended]
    1.74    0.00    2.14    0.65   81%  18% Scheduler unlock [many low prio]

    0.80    0.00    2.14    1.00   62%  62% Init mutex
    2.60    2.14    6.41    0.76   81%  81% Lock [unlocked] mutex
    3.21    2.14    8.55    1.20   96%  56% Unlock [locked] mutex
    2.54    2.14    4.27    0.65   81%  81% Trylock [unlocked] mutex
    2.34    2.14    4.27    0.36   90%  90% Trylock [locked] mutex
    0.47    0.00    2.14    0.73   78%  78% Destroy mutex
   13.09   12.82   19.23    0.50   93%  93% Unlock/Lock mutex

    1.40    0.00    2.14    0.96   65%  34% Create mbox
    0.47    0.00    2.14    0.73   78%  78% Peek [empty] mbox
    3.00    2.14    4.27    1.03   59%  59% Put [first] mbox
    0.67    0.00    2.14    0.92   68%  68% Peek [1 msg] mbox
    3.00    2.14    4.27    1.03   59%  59% Put [second] mbox
    0.80    0.00    2.14    1.00   62%  62% Peek [2 msgs] mbox
    3.07    2.14    4.27    1.05   56%  56% Get [first] mbox
    3.14    2.14    6.41    1.13   56%  56% Get [second] mbox
    2.60    2.14    4.27    0.73   78%  78% Tryput [first] mbox
    2.80    2.14    4.27    0.92   68%  68% Peek item [non-empty] mbox
    3.00    2.14    6.41    1.08   62%  62% Tryget [non-empty] mbox
    2.54    2.14    4.27    0.65   81%  81% Peek item [empty] mbox
    2.47    2.14    4.27    0.56   84%  84% Tryget [empty] mbox
    0.80    0.00    2.14    1.00   62%  62% Waiting to get mbox
    1.00    0.00    2.14    1.06   53%  53% Waiting to put mbox
    3.34    2.14    6.41    1.13   50%  46% Delete mbox
    6.61    6.41   12.82    0.38   96%  96% Put/Get mbox

    0.73    0.00    2.14    0.96   65%  65% Init semaphore
    2.20    0.00    4.27    0.26   90%   3% Post [0] semaphore
    2.40    2.14    4.27    0.47   87%  87% Wait [1] semaphore
    2.20    2.14    4.27    0.13   96%  96% Trywait [0] semaphore
    1.34    0.00    2.14    1.00   62%  37% Trywait [1] semaphore
    0.87    0.00    2.14    1.03   59%  59% Peek semaphore
    0.67    0.00    2.14    0.92   68%  68% Destroy semaphore
    8.75    8.55   14.96    0.38   96%  96% Post/Wait semaphore

    1.20    0.00    2.14    1.05   56%  43% Create counter
    0.40    0.00    2.14    0.65   81%  81% Get counter value
    0.67    0.00    2.14    0.92   68%  68% Set counter value
    2.60    2.14    4.27    0.73   78%  78% Tick counter
    1.00    0.00    2.14    1.06   53%  53% Delete counter

    0.73    0.00    2.14    0.96   65%  65% Init flag
    2.34    2.14    6.41    0.37   93%  93% Destroy flag
    1.87    0.00    2.14    0.47   87%  12% Mask bits in flag
    2.40    2.14    4.27    0.47   87%  87% Set bits in flag [no waiters]
    3.40    2.14    6.41    1.11   53%  43% Wait for flag [AND]
    3.27    2.14    4.27    1.06   53%  46% Wait for flag [OR]
    3.47    2.14    6.41    1.08   56%  40% Wait for flag [AND/CLR]
    3.40    2.14    6.41    1.11   53%  43% Wait for flag [OR/CLR]
    0.47    0.00    2.14    0.73   78%  78% Peek on flag

    1.47    0.00    4.27    1.01   62%  34% Create alarm
    4.41    2.14    8.55    0.38   90%   3% Initialize alarm
    2.27    2.14    4.27    0.25   93%  93% Disable alarm
    4.21    2.14    8.55    0.39   87%   9% Enable alarm
    2.67    2.14    4.27    0.80   75%  75% Delete alarm
    2.74    2.14    4.27    0.86   71%  71% Tick counter [1 alarm]
   14.82   12.82   17.09    0.38   87%   9% Tick counter [many alarms]
    4.87    4.27    6.41    0.86   71%  71% Tick & fire counter [1 alarm]
   86.14   85.47   87.61    0.92   68%  68% Tick & fire counters [>1 together]
   16.89   14.96   19.23    0.48   84%  12% Tick & fire counters [>1 separately]
   10.77   10.68   14.96    0.16   96%  96% Alarm latency [0 threads]
   12.85   12.82   17.09    0.06   99%  99% Alarm latency [2 threads]
   14.06   10.68   17.09    1.21   46%   0% Alarm latency [many threads]
   21.45   21.37   32.05    0.16   99%  99% Alarm -> thread resume latency

    2.20    2.14    6.41    0.00            Clock/interrupt latency

    6.18    4.27   10.68    0.00            Clock DSR latency

   12       0     296  (main stack:  1392)  Thread stack used (1360 total)
           All done, main stack : stack used  1392 size  3920
            All done :  Interrupt stack used   208 size  4096
            All done : Idlethread stack used   276 size  2048

Timing complete - 30200 ms total

PASS:<Basic timing OK>
EXIT:<done>
    

Other Issues

The DNP/9200 with DNP/EVA9 platform HAL does not affect the implementation of other parts of the eCos HAL specification. The AT91RM9200 processor HAL, ARM9 variant HAL, and the ARM architectural HAL documentation should be consulted for further details.

2017-02-09
Documentation license for this page: eCosPro License