The HAL Port

Name

HAL Port -- Implementation Details

Overview

This documentation explains how the eCos HAL specification has been mapped onto the AT91SAM7A3-EK hardware, and should be read in conjunction with that specification. The AT91SAM7A3-EK platform HAL package complements the ARM architectural HAL, the AT91 variant HAL and the AT91SAM7 processor HAL. It provides functionality which is specific to the target board.

Startup

Following a hard or soft reset, the HAL will initialize or reinitialize most of the on-chip peripherals. There is an exception for RAM startup applications which depend on a ROM monitor or JTAG device for certain services.

For ROM startup, the HAL will perform additional initialization, setting up the PLL and programming the various internal registers. This is all done in the PLATFORM_SETUP1 macro in the assembler header file hal_platform_setup.h.

Linker Scripts and Memory Maps

The AT91SAM7 processor HAL package provides the memory layout information needed to generate the linker script. The key memory locations are as follows:

On-chip Flash

This is located at address 0x00100000 of the physical memory space.

On-chip RAM

This is located at address 0x00200000 of the physical memory space. During booting this memory is only available at this address, but during the boot process it is also remapped to location 0x00000000 in order to allow the hardware exception vectors to be in RAM. The first 32 bytes are used for hardware exception vectors. The next 32 bytes are used for the VSR table and the next 256 bytes are normally used for the eCos virtual vectors, allowing RAM-based applications to use services provided by the ROM monitor. For ROM startup, all remaining RAM is available. For RAM startup, available RAM starts at location 0x00201000, with the bottom 4KiB reserved for use by the GDB stubs.

On-chip Peripheral Registers

These are located at address 0xFF000000 in the physical memory space.

Real-time characterization

The tm_basic kernel test gives statistics gathered about the real-time characterization and performance of the kernel. The sample output is shown here for information. The test was built in ARM mode, which provided better performance than Thumb mode.

            Startup, main stack : stack used   456 size  3920
             Startup :  Interrupt stack used  4064 size  4096
             Startup : Idlethread stack used   120 size  2048

eCos Kernel Timings
Notes: all times are in microseconds (.000001) unless otherwise stated

Reading the hardware clock takes 3 'ticks' overhead
... this value will be factored out of all other measurements
Clock interrupt took   47.13 microseconds (141 raw clock ticks)

Testing parameters:
   Clock samples:            32
   Threads:                   1
   Thread switches:         128
   Mutexes:                  32
   Mailboxes:                21
   Semaphores:               32
   Scheduler operations:    128
   Counters:                 32
   Flags:                    32
   Alarms:                   32


                                 Confidence
     Ave     Min     Max     Var  Ave  Min  Function
  ======  ======  ======  ====== ========== ========
  144.33  144.33  144.33    0.00  100% 100% Create thread
   18.33   18.33   18.33    0.00  100% 100% Yield thread [all suspended]
   14.67   14.67   14.67    0.00  100% 100% Suspend [suspended] thread
   14.67   14.67   14.67    0.00  100% 100% Resume thread
   17.33   17.33   17.33    0.00  100% 100% Set priority
    0.67    0.67    0.67    0.00  100% 100% Get priority
   32.33   32.33   32.33    0.00  100% 100% Kill [suspended] thread
   18.67   18.67   18.67    0.00  100% 100% Yield [no other] thread
   22.67   22.67   22.67    0.00  100% 100% Resume [suspended low prio] thread
   14.67   14.67   14.67    0.00  100% 100% Resume [runnable low prio] thread
   18.00   18.00   18.00    0.00  100% 100% Suspend [runnable] thread
   18.67   18.67   18.67    0.00  100% 100% Yield [only low prio] thread
   14.67   14.67   14.67    0.00  100% 100% Suspend [runnable->not runnable]
   32.00   32.00   32.00    0.00  100% 100% Kill [runnable] thread
   31.33   31.33   31.33    0.00  100% 100% Destroy [dead] thread
   55.67   55.67   55.67    0.00  100% 100% Destroy [runnable] thread
  106.67  106.67  106.67    0.00  100% 100% Resume [high priority] thread

    0.85    0.67    1.00    0.16   56%  43% Scheduler lock
   13.31   13.00   13.33    0.04   93%   6% Scheduler unlock [0 threads]
   13.31   13.00   13.33    0.04   93%   6% Scheduler unlock [1 suspended]
   13.31   13.00   13.33    0.04   93%   6% Scheduler unlock [many suspended]
   13.31   13.00   13.33    0.04   93%   6% Scheduler unlock [many low prio]

    2.33    2.33    2.33    0.00  100% 100% Init mutex
   18.58   18.33   18.67    0.13   75%  25% Lock [unlocked] mutex
   20.68   20.67   21.00    0.02   96%  96% Unlock [locked] mutex
   16.58   16.33   16.67    0.13   75%  25% Trylock [unlocked] mutex
   15.96   15.67   16.00    0.07   87%  12% Trylock [locked] mutex
    1.00    1.00    1.00    0.00  100% 100% Destroy mutex
   85.56   85.33   85.67    0.14   68%  31% Unlock/Lock mutex

    3.90    3.67    4.00    0.14   71%  28% Create mbox
    0.29    0.00    0.33    0.08   85%  14% Peek [empty] mbox
   19.90   19.67   20.00    0.14   71%  28% Put [first] mbox
    0.33    0.33    0.33    0.00  100% 100% Peek [1 msg] mbox
   19.92   19.67   20.00    0.12   76%  23% Put [second] mbox
    0.33    0.33    0.33    0.00  100% 100% Peek [2 msgs] mbox
   20.00   20.00   20.00    0.00  100% 100% Get [first] mbox
   20.00   20.00   20.00    0.00  100% 100% Get [second] mbox
   18.92   18.67   19.00    0.12   76%  23% Tryput [first] mbox
   16.49   16.33   16.67    0.17   52%  52% Peek item [non-empty] mbox
   17.49   17.33   17.67    0.17   52%  52% Tryget [non-empty] mbox
   16.33   16.33   16.33    0.00  100% 100% Peek item [empty] mbox
   16.56   16.33   16.67    0.15   66%  33% Tryget [empty] mbox
    0.40    0.33    0.67    0.10   80%  80% Waiting to get mbox
    0.40    0.33    0.67    0.10   80%  80% Waiting to put mbox
    2.16    2.00    2.33    0.17   52%  52% Delete mbox
   68.73   68.67   69.00    0.10   80%  80% Put/Get mbox

    2.33    2.33    2.33    0.00  100% 100% Init semaphore
   14.00   14.00   14.00    0.00  100% 100% Post [0] semaphore
   14.50   14.33   14.67    0.17  100%  50% Wait [1] semaphore
   13.96   13.67   14.00    0.07   87%  12% Trywait [0] semaphore
   14.00   14.00   14.00    0.00  100% 100% Trywait [1] semaphore
    2.38    2.33    2.67    0.07   87%  87% Peek semaphore
    0.83    0.67    1.00    0.17  100%  50% Destroy semaphore
   58.07   58.00   58.33    0.11   78%  78% Post/Wait semaphore

    4.00    4.00    4.00    0.00  100% 100% Create counter
    0.46    0.33    0.67    0.16   62%  62% Get counter value
    0.46    0.33    0.67    0.16   62%  62% Set counter value
   15.46   15.33   15.67    0.16   62%  62% Tick counter
    0.50    0.33    0.67    0.17  100%  50% Delete counter

    2.25    2.00    2.33    0.13   75%  25% Init flag
   14.33   14.33   14.33    0.00  100% 100% Destroy flag
   13.75   13.67   14.00    0.13   75%  75% Mask bits in flag
   15.67   15.67   15.67    0.00  100% 100% Set bits in flag [no waiters]
   19.83   19.67   20.00    0.17  100%  50% Wait for flag [AND]
   19.58   19.33   19.67    0.13   75%  25% Wait for flag [OR]
   19.83   19.67   20.00    0.17  100%  50% Wait for flag [AND/CLR]
   19.58   19.33   19.67    0.13   75%  25% Wait for flag [OR/CLR]
    0.25    0.00    0.33    0.13   75%  25% Peek on flag

    5.27    5.00    5.33    0.10   81%  18% Create alarm
   20.54   20.33   20.67    0.16   62%  37% Initialize alarm
   13.90   13.67   14.00    0.14   68%  31% Disable alarm
   19.85   19.67   20.00    0.16   56%  43% Enable alarm
   14.65   14.33   14.67    0.04   93%   6% Delete alarm
   17.42   17.33   17.67    0.13   75%  75% Tick counter [1 alarm]
   82.65   82.33   82.67    0.04   93%   6% Tick counter [many alarms]
   26.08   26.00   26.33    0.13   75%  75% Tick & fire counter [1 alarm]
  371.00  369.67  402.67    1.98   96%  96% Tick & fire counters [>1 together]
   91.63   91.33   91.67    0.07   87%  12% Tick & fire counters [>1 separately]
   38.33   38.33   38.33    0.00  100% 100% Alarm latency [0 threads]
   40.89   38.33   44.67    2.44   27%  47% Alarm latency [many threads]
   93.75   93.67  104.67    0.17   99%  99% Alarm -> thread resume latency

    6.66    6.33    6.67    0.00            Clock/interrupt latency

   14.37   13.00  261.33    0.00            Clock DSR latency

 1360   1360    1360  (main stack:  3920)  Thread stack used (1360 total)
           All done, main stack : stack used   896 size  3920
            All done :  Interrupt stack used   212 size  4096
            All done : Idlethread stack used   304 size  2048

Timing complete - 23730 ms total

PASS:<Basic timing OK>
EXIT:<done>
    

Other Issues

The AT91SAM7A3-EK platform HAL does not affect the implementation of other parts of the eCos HAL specification. The AT91SAM7 processor HAL, AT91 variant HAL, and the ARM architectural HAL documentation should be consulted for further details.

2017-02-09
Documentation license for this page: eCosPro License