This documentation explains how the eCos HAL specification has been
mapped onto the AT91RM9200-EK/DK hardware, and should be read in conjunction
with that specification. The AT91RM9200-EK/DK platform HAL package complements
the ARM architectural HAL, the ARM9 variant HAL and the AT91RM9200 processor
HAL. It provides functionality which is specific to the target board.
Startup
Following a hard or soft reset, the HAL will initialize or
reinitialize most of the on-chip peripherals. There is an exception
for RAM startup applications which depend on a ROM monitor for certain
services.
For ROM or ROMRAM startup, the HAL will perform additional
initialization, setting up the external RAM and programming the
various internal registers. This is all done in the
PLATFORM_SETUP1 macro in the assembler
header file hal_platform_setup.h.
Linker Scripts and Memory Maps
The platform HAL package provides the memory layout information needed
to generate the linker script. The key memory locations are as follows:
Flash
This is located at address 0x10000000 of the physical memory space.
The HAL uses the MMU to locate it at virtual
address 0x60000000 after initialization.
It remains accessible at address 0x1000000 but accesses
to this address range are uncached.
SDRAM
This is located at address 0x20000000 of the physical memory
space. The HAL configures the MMU to retain the SDRAM at virtual
address 0x20000000, but in order to assign hardware exception vectors
vectors at address 0x00000000, the HAL also uses the MMU to create a clone
of this memory at virtual address 0x00000000. The same memory is also
accessible uncached and unbuffered at virtual location 0x30000000 for use by
devices. The first 32 bytes are used for hardware exception vectors. The next
32 bytes are used for the VSR table and the next 256 bytes are normally
used for the eCos virtual vectors, allowing RAM-based applications to
use services provided by the ROM monitor. Memory is required for the
MMU tables, and must be aligned on a 16Kbyte boundary. These therefore
occupy memory from 0x4000 to 0x8000. For ROM/ROMRAM startup, all
remaining SDRAM is available. For RAM startup, available RAM starts at
virtual location 0x00040000, with the bottom 256kB reserved for use by
RedBoot.
On-chip SRAM
This is located at address 0x00200000 of the physical memory
space. However the HAL uses the MMU to relocate this to virtual
address 0x70000000. The same memory is also accessible uncached and
unbuffered at virtual location 0x70100000 for use by devices. At
present this memory is entirely reserved for use by the ethernet
interface, since there are problems using external SDRAM for ethernet
buffers.
On-chip ROM
This is located at address 0x00100000 of the physical memory
space. However the HAL uses the MMU to relocate this to virtual
address 0x71000000. The same memory is also accessible uncached and
unbuffered at virtual location 0x71800000.
USB host port
The USB host port (UHP) registers are located at address 0x00300000 of
the physical memory space. However the HAL uses the MMU to relocate this
to virtual address 0x72800000. Memory accessed at this address is
uncached and unbuffered. There is no cached variant.
SPI dataflash
SPI Dataflash media can only be accessed with the Flash API. For the
purposes of this API a placeholder address range has been allocated
as if the Flash is present at this address. The base of this address
range is 0x30000000 and the extent will clearly depend on the
Dataflash capacity. This reserved range is not real memory and
any attempt to access it directly by the processor other than via
the Flash API will result in a memory address exception.
On-chip Peripheral Registers
These are located at address 0xFF000000 in the physical memory
space. When the MMU is enabled, it sets up a direct, uncached,
unbuffered mapping so that these registers remain accessible
at their physical locations.
Off-chip Peripherals
eCos uses the SDRAM, parallel NOR flash, ethernet PHY, SPI dataflash
and MCI facilities on the AT91RM9200-EK/DK boards. eCos does
not currently make any use of any other off-chip peripherals present
on these boards.
Advanced Interrupt Controller
This port has been designed to exploit benefits of the Advanced Interrupt Controller
of the AT91RM9200, using the facilities of the AT91RM9200 processor HAL. Consult
the documentation in that package for details.
SPI Dataflash
eCos supports SPI access to Dataflash on the AT91RM9200. Two physical slots are
provided on the board, but only the upper one may be used for
SPI dataflash, not the one on the underside. This is due to an AT91RM9200 errata
affecting SPI chip selects.
Accesses to Dataflash are performed via the Flash API, using 0x30000000 as the
nominal address of the device, although it does not truly exist in the processor
address space. On driver initialisation, eCos and RedBoot can detect the presence
of a card in the socket. In particular, on reset RedBoot will indicate the presence
of Flash at the 0x30000000 address range in its startup banner if it has been
successfully detected. Hot swapping is not possible.
Since Dataflash is not directly addressable, access from RedBoot is only possible
using fis command operations. Flash partitions within the FIS
can be created, although users should be aware that the FIS partition data is
stored in the NOR flash, and not on a per-Dataflash card basis. Therefore if a
second Dataflash card is inserted it will appear to have the same FIS partitions
residing on the card. Care must be taken if swapping between cards with differing
partition layouts.
The MCI driver cannot be enabled simultaneously with the SPI driver, as the drivers
need differing pin configurations for the same pins on this board due to the shared
socket.
Real-time characterization
The tm_basic kernel test gives statistics gathered about the real-time
characterization and performance of the kernel. The sample output is shown here
for information. The test was built in ARM mode, which provided better performance
than Thumb mode.
The AT91RM9200-EK/DK platform HAL does not affect the implementation of other
parts of the eCos HAL specification. The AT91RM9200 processor HAL, ARM9
variant HAL, and the ARM architectural HAL documentation should be consulted
for further details.
